DPDK logo

Elixir Cross Referencer

   1
   2
   3
   4
   5
   6
   7
   8
   9
  10
  11
  12
  13
  14
  15
  16
  17
  18
  19
  20
  21
  22
  23
  24
  25
  26
  27
  28
  29
  30
  31
  32
  33
  34
  35
  36
  37
  38
  39
  40
  41
  42
  43
  44
  45
  46
  47
  48
  49
  50
  51
  52
  53
  54
  55
  56
  57
  58
  59
  60
  61
  62
  63
  64
  65
  66
  67
  68
  69
  70
  71
  72
  73
  74
  75
  76
  77
  78
  79
  80
  81
  82
  83
  84
  85
  86
  87
  88
  89
  90
  91
  92
  93
  94
  95
  96
  97
  98
  99
 100
 101
 102
 103
 104
 105
 106
 107
 108
 109
 110
 111
 112
 113
 114
 115
 116
 117
 118
 119
 120
 121
 122
 123
 124
 125
 126
 127
 128
 129
 130
 131
 132
 133
 134
 135
 136
 137
 138
 139
 140
 141
 142
 143
 144
 145
 146
 147
 148
 149
 150
 151
 152
 153
 154
 155
 156
 157
 158
 159
 160
 161
 162
 163
 164
 165
 166
 167
 168
 169
 170
 171
 172
 173
 174
 175
 176
 177
 178
 179
 180
 181
 182
 183
 184
 185
 186
 187
 188
 189
 190
 191
 192
 193
 194
 195
 196
 197
 198
 199
 200
 201
 202
 203
 204
 205
 206
 207
 208
 209
 210
 211
 212
 213
 214
 215
 216
 217
 218
 219
 220
 221
 222
 223
 224
 225
 226
 227
 228
 229
 230
 231
 232
 233
 234
 235
 236
 237
 238
 239
 240
 241
 242
 243
 244
 245
 246
 247
 248
 249
 250
 251
 252
 253
 254
 255
 256
 257
 258
 259
 260
 261
 262
 263
 264
 265
 266
 267
 268
 269
 270
 271
 272
 273
 274
 275
 276
 277
 278
 279
 280
 281
 282
 283
 284
 285
 286
 287
 288
 289
 290
 291
 292
 293
 294
 295
 296
 297
 298
 299
 300
 301
 302
 303
 304
 305
 306
 307
 308
 309
 310
 311
 312
 313
 314
 315
 316
 317
 318
 319
 320
 321
 322
 323
 324
 325
 326
 327
 328
 329
 330
 331
 332
 333
 334
 335
 336
 337
 338
 339
 340
 341
 342
 343
 344
 345
 346
 347
 348
 349
 350
 351
 352
 353
 354
 355
 356
 357
 358
 359
 360
 361
 362
 363
 364
 365
 366
 367
 368
 369
 370
 371
 372
 373
 374
 375
 376
 377
 378
 379
 380
 381
 382
 383
 384
 385
 386
 387
 388
 389
 390
 391
 392
 393
 394
 395
 396
 397
 398
 399
 400
 401
 402
 403
 404
 405
 406
 407
 408
 409
 410
 411
 412
 413
 414
 415
 416
 417
 418
 419
 420
 421
 422
 423
 424
 425
 426
 427
 428
 429
 430
 431
 432
 433
 434
 435
 436
 437
 438
 439
 440
 441
 442
 443
 444
 445
 446
 447
 448
 449
 450
 451
 452
 453
 454
 455
 456
 457
 458
 459
 460
 461
 462
 463
 464
 465
 466
 467
 468
 469
 470
 471
 472
 473
 474
 475
 476
 477
 478
 479
 480
 481
 482
 483
 484
 485
 486
 487
 488
 489
 490
 491
 492
 493
 494
 495
 496
 497
 498
 499
 500
 501
 502
 503
 504
 505
 506
 507
 508
 509
 510
 511
 512
 513
 514
 515
 516
 517
 518
 519
 520
 521
 522
 523
 524
 525
 526
 527
 528
 529
 530
 531
 532
 533
 534
 535
 536
 537
 538
 539
 540
 541
 542
 543
 544
 545
 546
 547
 548
 549
 550
 551
 552
 553
 554
 555
 556
 557
 558
 559
 560
 561
 562
 563
 564
 565
 566
 567
 568
 569
 570
 571
 572
 573
 574
 575
 576
 577
 578
 579
 580
 581
 582
 583
 584
 585
 586
 587
 588
 589
 590
 591
 592
 593
 594
 595
 596
 597
 598
 599
 600
 601
 602
 603
 604
 605
 606
 607
 608
 609
 610
 611
 612
 613
 614
 615
 616
 617
 618
 619
 620
 621
 622
 623
 624
 625
 626
 627
 628
 629
 630
 631
 632
 633
 634
 635
 636
 637
 638
 639
 640
 641
 642
 643
 644
 645
 646
 647
 648
 649
 650
 651
 652
 653
 654
 655
 656
 657
 658
 659
 660
 661
 662
 663
 664
 665
 666
 667
 668
 669
 670
 671
 672
 673
 674
 675
 676
 677
 678
 679
 680
 681
 682
 683
 684
 685
 686
 687
 688
 689
 690
 691
 692
 693
 694
 695
 696
 697
 698
 699
 700
 701
 702
 703
 704
 705
 706
 707
 708
 709
 710
 711
 712
 713
 714
 715
 716
 717
 718
 719
 720
 721
 722
 723
 724
 725
 726
 727
 728
 729
 730
 731
 732
 733
 734
 735
 736
 737
 738
 739
 740
 741
 742
 743
 744
 745
 746
 747
 748
 749
 750
 751
 752
 753
 754
 755
 756
 757
 758
 759
 760
 761
 762
 763
 764
 765
 766
 767
 768
 769
 770
 771
 772
 773
 774
 775
 776
 777
 778
 779
 780
 781
 782
 783
 784
 785
 786
 787
 788
 789
 790
 791
 792
 793
 794
 795
 796
 797
 798
 799
 800
 801
 802
 803
 804
 805
 806
 807
 808
 809
 810
 811
 812
 813
 814
 815
 816
 817
 818
 819
 820
 821
 822
 823
 824
 825
 826
 827
 828
 829
 830
 831
 832
 833
 834
 835
 836
 837
 838
 839
 840
 841
 842
 843
 844
 845
 846
 847
 848
 849
 850
 851
 852
 853
 854
 855
 856
 857
 858
 859
 860
 861
 862
 863
 864
 865
 866
 867
 868
 869
 870
 871
 872
 873
 874
 875
 876
 877
 878
 879
 880
 881
 882
 883
 884
 885
 886
 887
 888
 889
 890
 891
 892
 893
 894
 895
 896
 897
 898
 899
 900
 901
 902
 903
 904
 905
 906
 907
 908
 909
 910
 911
 912
 913
 914
 915
 916
 917
 918
 919
 920
 921
 922
 923
 924
 925
 926
 927
 928
 929
 930
 931
 932
 933
 934
 935
 936
 937
 938
 939
 940
 941
 942
 943
 944
 945
 946
 947
 948
 949
 950
 951
 952
 953
 954
 955
 956
 957
 958
 959
 960
 961
 962
 963
 964
 965
 966
 967
 968
 969
 970
 971
 972
 973
 974
 975
 976
 977
 978
 979
 980
 981
 982
 983
 984
 985
 986
 987
 988
 989
 990
 991
 992
 993
 994
 995
 996
 997
 998
 999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2017 Intel Corporation

#
# String that appears before the version number
#
CONFIG_RTE_VER_PREFIX="DPDK"

#
# Version information completed when this file is processed for a build
#
CONFIG_RTE_VER_YEAR=__YEAR
CONFIG_RTE_VER_MONTH=__MONTH
CONFIG_RTE_VER_MINOR=__MINOR
CONFIG_RTE_VER_SUFFIX=__SUFFIX
CONFIG_RTE_VER_RELEASE=__RELEASE

#
# define executive environment
# RTE_EXEC_ENV values are the directories in mk/exec-env/
#
CONFIG_RTE_EXEC_ENV=

#
# define the architecture we compile for.
# RTE_ARCH values are the directories in mk/arch/
#
CONFIG_RTE_ARCH=

#
# machine can define specific variables or action for a specific board
# RTE_MACHINE values are the directories in mk/machine/
#
CONFIG_RTE_MACHINE=

#
# The compiler we use.
# RTE_TOOLCHAIN values are the directories in mk/toolchain/
#
CONFIG_RTE_TOOLCHAIN=

#
# Use intrinsics or assembly code for key routines
#
CONFIG_RTE_FORCE_INTRINSICS=n

#
# Machine forces strict alignment constraints.
#
CONFIG_RTE_ARCH_STRICT_ALIGN=n

#
# Enable link time optimization
#
CONFIG_RTE_ENABLE_LTO=n

#
# Compile to share library
#
CONFIG_RTE_BUILD_SHARED_LIB=n

#
# Use newest code breaking previous ABI
#
CONFIG_RTE_NEXT_ABI=y

#
# Machine's cache line size
#
CONFIG_RTE_CACHE_LINE_SIZE=64

#
# Memory model
#
CONFIG_RTE_USE_C11_MEM_MODEL=n

#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=128
CONFIG_RTE_MAX_NUMA_NODES=8
CONFIG_RTE_MAX_HEAPS=32
CONFIG_RTE_MAX_MEMSEG_LISTS=64
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192
CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768
# a "type" is a combination of page size and NUMA node. total number of memseg
# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split
# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or
# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of
# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller
CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768
CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072
# global maximum usable amount of VA, in megabytes
CONFIG_RTE_MAX_MEM_MB=524288
CONFIG_RTE_MAX_MEMZONE=2560
CONFIG_RTE_MAX_TAILQ=32
CONFIG_RTE_ENABLE_ASSERT=n
CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
CONFIG_RTE_ENABLE_TRACE_FP=n
CONFIG_RTE_LOG_HISTORY=256
CONFIG_RTE_BACKTRACE=y
CONFIG_RTE_LIBEAL_USE_HPET=n
CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=n
CONFIG_RTE_MAX_VFIO_GROUPS=64
CONFIG_RTE_MAX_VFIO_CONTAINERS=64
CONFIG_RTE_MALLOC_DEBUG=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
CONFIG_RTE_USE_LIBBSD=n
# Use WFE instructions to implement the rte_wait_for_equal_xxx APIs,
# calling these APIs put the cores in low power state while waiting
# for the memory address to become equal to the expected value.
# This is supported only by aarch64.
CONFIG_RTE_ARM_USE_WFE=n

#
# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
# AVX512 is marked as experimental for now, will enable it after enough
# field test and possible optimization.
#
CONFIG_RTE_ENABLE_AVX=y
CONFIG_RTE_ENABLE_AVX512=n

# Use ARM LSE ATOMIC instructions
CONFIG_RTE_ARM_FEATURE_ATOMICS=n

# Default driver path (or "" to disable)
CONFIG_RTE_EAL_PMD_PATH=""

#
# Compile Environment Abstraction Layer to support Vmware TSC map
#
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y

#
# Compile the PCI library
#
CONFIG_RTE_LIBRTE_PCI=y

#
# Compile the argument parser library
#
CONFIG_RTE_LIBRTE_KVARGS=y

#
# Compile generic ethernet library
#
CONFIG_RTE_LIBRTE_ETHER=y
CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
CONFIG_RTE_MAX_ETHPORTS=32
CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n

#
# Turn off Tx preparation stage
#
# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
# driver which do not implement any Tx preparation.
#
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n

#
# Common libraries, before Bus/PMDs
#
CONFIG_RTE_LIBRTE_COMMON_DPAAX=n

#
# Compile the Intel FPGA bus
#
CONFIG_RTE_LIBRTE_IFPGA_BUS=y

#
# Compile PCI bus driver
#
CONFIG_RTE_LIBRTE_PCI_BUS=y

#
# Compile the vdev bus
#
CONFIG_RTE_LIBRTE_VDEV_BUS=y

#
# Compile ARK PMD
#
CONFIG_RTE_LIBRTE_ARK_PMD=y
CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n

#
# Compile Aquantia Atlantic PMD driver
#
CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y

#
# Compile AMD PMD
#
CONFIG_RTE_LIBRTE_AXGBE_PMD=y
CONFIG_RTE_LIBRTE_AXGBE_PMD_DEBUG=n

#
# Compile burst-oriented Broadcom PMD driver
#
CONFIG_RTE_LIBRTE_BNX2X_PMD=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n

#
# Compile burst-oriented Broadcom BNXT PMD driver
#
CONFIG_RTE_LIBRTE_BNXT_PMD=y

#
# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
#
CONFIG_RTE_LIBRTE_CXGBE_PMD=y

#
# Compile burst-oriented NXP PFE PMD driver
#
CONFIG_RTE_LIBRTE_PFE_PMD=n

# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=n
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
CONFIG_RTE_LIBRTE_DPAA_PMD=n
CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n

#
# Compile NXP DPAA2 FSL-MC Bus
#
CONFIG_RTE_LIBRTE_FSLMC_BUS=n

#
# Compile Support Libraries for NXP DPAA2
#
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y

#
# Compile burst-oriented NXP DPAA2 PMD driver
#
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n

#
# Compile NXP ENETC PMD Driver
#
CONFIG_RTE_LIBRTE_ENETC_PMD=n

#
# Compile burst-oriented Amazon ENA PMD driver
#
CONFIG_RTE_LIBRTE_ENA_PMD=y
CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n

#
# Compile burst-oriented Cisco ENIC PMD driver
#
CONFIG_RTE_LIBRTE_ENIC_PMD=y

#
# Compile burst-oriented IGB & EM PMD drivers
#
CONFIG_RTE_LIBRTE_EM_PMD=y
CONFIG_RTE_LIBRTE_IGB_PMD=y
CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n

#
# Compile burst-oriented HINIC PMD driver
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n

#
# Compile burst-oriented HNS3 PMD driver
#
CONFIG_RTE_LIBRTE_HNS3_PMD=n

#
# Compile Pensando IONIC PMD driver
#
CONFIG_RTE_LIBRTE_IONIC_PMD=y

#
# Compile burst-oriented IXGBE PMD driver
#
CONFIG_RTE_LIBRTE_IXGBE_PMD=y
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n

#
# Compile burst-oriented I40E PMD driver
#
CONFIG_RTE_LIBRTE_I40E_PMD=y
CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4

#
# Compile burst-oriented FM10K PMD
#
CONFIG_RTE_LIBRTE_FM10K_PMD=y
CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y

#
# Compile burst-oriented ICE PMD driver
#
CONFIG_RTE_LIBRTE_ICE_PMD=y
CONFIG_RTE_LIBRTE_ICE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n

# Compile burst-oriented IAVF PMD driver
#
CONFIG_RTE_LIBRTE_IAVF_PMD=y
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC=n
CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC=n
#
# Compile burst-oriented IPN3KE PMD driver
#
CONFIG_RTE_LIBRTE_IPN3KE_PMD=n

#
# Compile burst-oriented IGC PMD drivers
#
CONFIG_RTE_LIBRTE_IGC_PMD=y
CONFIG_RTE_LIBRTE_IGC_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IGC_DEBUG_TX=n

#
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
#
CONFIG_RTE_LIBRTE_MLX4_PMD=n
CONFIG_RTE_LIBRTE_MLX4_DEBUG=n

#
# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5,
# ConnectX-6 & BlueField (MLX5) PMD
#
CONFIG_RTE_LIBRTE_MLX5_PMD=n
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n

#
# Compile regex-oriented Mellanox PMD
#
CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD=n

#
# Compile vdpa-oriented Mellanox ConnectX-6 & BlueField (MLX5) PMD
#
CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD=n

# Linking method for mlx4/5 dependency on ibverbs and related libraries
# Default linking is dynamic by linker.
# Other options are: dynamic by dlopen at run-time, or statically embedded.
CONFIG_RTE_IBVERBS_LINK_DLOPEN=n
CONFIG_RTE_IBVERBS_LINK_STATIC=n

#
# Compile burst-oriented Netronome NFP PMD driver
#
CONFIG_RTE_LIBRTE_NFP_PMD=n
CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n

# QLogic 10G/25G/40G/50G/100G PMD
#
CONFIG_RTE_LIBRTE_QEDE_PMD=y
CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
#Provides abs path/name of the firmware file.
#Empty string denotes driver will use default firmware
CONFIG_RTE_LIBRTE_QEDE_FW=""

#
# Compile burst-oriented Solarflare libefx-based PMD
#
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=y
CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n

#
# Compile software PMD backed by SZEDATA2 device
#
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n

#
# Compile software PMD backed by NFB device
#
CONFIG_RTE_LIBRTE_NFB_PMD=n

#
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
#
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n

#
# Compile burst-oriented Cavium LiquidIO PMD driver
#
CONFIG_RTE_LIBRTE_LIO_PMD=y
CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n

#
# Compile burst-oriented Cavium OCTEONTX network PMD driver
#
CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y

#
# Compile burst-oriented Marvell OCTEON TX2 network PMD driver
#
CONFIG_RTE_LIBRTE_OCTEONTX2_PMD=y

#
# Compile WRS accelerated virtual port (AVP) guest PMD driver
#
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n

#
# Compile burst-oriented VIRTIO PMD driver
#
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n

#
# Compile virtio device emulation inside virtio PMD driver
#
CONFIG_RTE_VIRTIO_USER=n

#
# Compile burst-oriented VMXNET3 PMD driver
#
CONFIG_RTE_LIBRTE_VMXNET3_PMD=y
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n

#
# Compile software PMD backed by AF_PACKET sockets (Linux only)
#
CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n

#
# Compile software PMD backed by AF_XDP sockets (Linux only)
#
CONFIG_RTE_LIBRTE_PMD_AF_XDP=n

#
# Compile Memory Interface PMD driver (Linux only)
#
CONFIG_RTE_LIBRTE_PMD_MEMIF=n

#
# Compile link bonding PMD library
#
CONFIG_RTE_LIBRTE_PMD_BOND=y
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n

#
# Compile fail-safe PMD
#
CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y

#
# Compile Marvell PMD driver
#
CONFIG_RTE_LIBRTE_MVPP2_PMD=n

#
# Compile Marvell MVNETA PMD driver
#
CONFIG_RTE_LIBRTE_MVNETA_PMD=n

#
# Compile support for VMBus library
#
CONFIG_RTE_LIBRTE_VMBUS=n

#
# Compile native PMD for Hyper-V/Azure
#
CONFIG_RTE_LIBRTE_NETVSC_PMD=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n

#
# Compile virtual device driver for NetVSC on Hyper-V/Azure
#
CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=n

#
# Compile null PMD
#
CONFIG_RTE_LIBRTE_PMD_NULL=y

#
# Compile software PMD backed by PCAP files
#
CONFIG_RTE_LIBRTE_PMD_PCAP=n

#
# Compile example software rings based PMD
#
CONFIG_RTE_LIBRTE_PMD_RING=y
CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16

#
# Compile SOFTNIC PMD
#
CONFIG_RTE_LIBRTE_PMD_SOFTNIC=n

#
# Compile the TAP PMD
# It is enabled by default for Linux only.
#
CONFIG_RTE_LIBRTE_PMD_TAP=n

#
# Do prefetch of packet data within PMD driver receive function
#
CONFIG_RTE_PMD_PACKET_PREFETCH=y

# Compile generic wireless base band device library
# EXPERIMENTAL: API may change without prior notice
#
CONFIG_RTE_LIBRTE_BBDEV=y
CONFIG_RTE_LIBRTE_BBDEV_DEBUG=n
CONFIG_RTE_BBDEV_MAX_DEVS=128
CONFIG_RTE_BBDEV_OFFLOAD_COST=y
CONFIG_RTE_BBDEV_SDK_AVX2=n
CONFIG_RTE_BBDEV_SDK_AVX512=n

#
# Compile PMD for NULL bbdev device
#
CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=y

#
# Compile PMD for turbo software bbdev device
#
CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y

#
# Compile PMD for Intel FPGA LTE FEC bbdev device
#
CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC=y

#
# Compile PMD for Intel FPGA 5GNR FEC bbdev device
#
CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC=y

#
# Compile generic crypto device library
#
CONFIG_RTE_LIBRTE_CRYPTODEV=y
CONFIG_RTE_CRYPTO_MAX_DEVS=64

#
# Compile PMD for ARMv8 Crypto device
#
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n

#
# Compile NXP CAAM JR crypto Driver
#
CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n

#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n

#
# NXP DPAA caam - crypto driver
#
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4

#
# Compile PMD for Cavium OCTEON TX crypto device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y

#
# Compile PMD for Marvell OCTEON TX2 crypto device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y

#
# Compile PMD for QuickAssist based devices - see docs for details
#
CONFIG_RTE_LIBRTE_PMD_QAT=y
CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n
#
# Max. number of QuickAssist devices, which can be detected and attached
#
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536

#
# Compile PMD for virtio crypto devices
#
CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO=y
#
# Number of maximum virtio crypto devices
#
CONFIG_RTE_MAX_VIRTIO_CRYPTO=32

#
# Compile PMD for AESNI backed device
#
CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n

#
# Compile PMD for Software backed device
#
CONFIG_RTE_LIBRTE_PMD_OPENSSL=n

#
# Compile PMD for AESNI GCM device
#
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n

#
# Compile PMD for SNOW 3G device
#
CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n

#
# Compile PMD for KASUMI device
#
CONFIG_RTE_LIBRTE_PMD_KASUMI=n

#
# Compile PMD for ZUC device
#
CONFIG_RTE_LIBRTE_PMD_ZUC=n

# Compile PMD for Crypto Scheduler device
#
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y

#
# Compile PMD for NULL Crypto device
#
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y

#
# Compile PMD for AMD CCP crypto device
#
CONFIG_RTE_LIBRTE_PMD_CCP=n

#
# Compile PMD for Marvell Crypto device
#
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n

#
# Compile PMD for NITROX crypto device
#
CONFIG_RTE_LIBRTE_PMD_NITROX=y

#
# Compile generic security library
#
CONFIG_RTE_LIBRTE_SECURITY=y

#
# Compile generic compression device library
#
CONFIG_RTE_LIBRTE_COMPRESSDEV=y
CONFIG_RTE_COMPRESS_MAX_DEVS=64

#
# Compile compressdev unit test
#
CONFIG_RTE_COMPRESSDEV_TEST=n

#
# Compile PMD for Octeontx ZIPVF compression device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y

#
# Compile PMD for ISA-L compression device
#
CONFIG_RTE_LIBRTE_PMD_ISAL=n

#
# Compile PMD for ZLIB compression device
#
CONFIG_RTE_LIBRTE_PMD_ZLIB=n

#
# Compile RegEx device support
#
CONFIG_RTE_LIBRTE_REGEXDEV=y
CONFIG_RTE_LIBRTE_REGEXDEV_DEBUG=n
CONFIG_RTE_MAX_REGEXDEV_DEVS=32

#
# Compile generic event device library
#
CONFIG_RTE_LIBRTE_EVENTDEV=y
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
CONFIG_RTE_EVENT_MAX_DEVS=16
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32

#
# Compile PMD for skeleton event device
#
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n

#
# Compile PMD for software event device
#
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y

#
# Compile PMD for distributed software event device
#
CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=y

#
# Compile PMD for octeontx sso event device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y

#
# Compile PMD for octeontx2 sso event device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV=y

#
# Compile PMD for OPDL event device
#
CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV=y

#
# Compile PMD for NXP DPAA event device
#
CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n

#
# Compile PMD for NXP DPAA2 event device
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n

#
# Compile raw device support
# EXPERIMENTAL: API may change without prior notice
#
CONFIG_RTE_LIBRTE_RAWDEV=y
CONFIG_RTE_RAWDEV_MAX_DEVS=64
CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=y

#
# Compile PMD for NXP DPAA2 CMDIF raw device
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=n

#
# Compile PMD for NXP DPAA2 QDMA raw device
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n

#
# Compile PMD for Intel FPGA raw device
#
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n

#
# Compile PMD for Intel IOAT raw device
#
CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=y

#
# Compile PMD for octeontx2 DMA raw device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y

#
# Compile PMD for octeontx2 EP raw device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV=y

#
# Compile PMD for NTB raw device
#
CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=y

#
# Compile librte_ring
#
CONFIG_RTE_LIBRTE_RING=y

#
# Compile librte_stack
#
CONFIG_RTE_LIBRTE_STACK=y

#
# Compile librte_mempool
#
CONFIG_RTE_LIBRTE_MEMPOOL=y
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n

#
# Compile Mempool drivers
#
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=y
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=64
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y

#
# Compile PMD for octeontx fpa mempool device
#
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y

#
# Compile PMD for octeontx2 npa mempool device
#
CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL=y

#
# Compile librte_mbuf
#
CONFIG_RTE_LIBRTE_MBUF=y
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
CONFIG_RTE_PKTMBUF_HEADROOM=128

#
# Compile librte_timer
#
CONFIG_RTE_LIBRTE_TIMER=y
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n

#
# Compile librte_cfgfile
#
CONFIG_RTE_LIBRTE_CFGFILE=y

#
# Compile librte_cmdline
#
CONFIG_RTE_LIBRTE_CMDLINE=y
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n

#
# Compile librte_hash
#
CONFIG_RTE_LIBRTE_HASH=y
CONFIG_RTE_LIBRTE_HASH_DEBUG=n

#
# Compile librte_efd
#
CONFIG_RTE_LIBRTE_EFD=y

#
# Compile librte_member
#
CONFIG_RTE_LIBRTE_MEMBER=y

#
# Compile librte_jobstats
#
CONFIG_RTE_LIBRTE_JOBSTATS=y

#
# Compile the device metrics library
#
CONFIG_RTE_LIBRTE_METRICS=y

#
# Compile the bitrate statistics library
#
CONFIG_RTE_LIBRTE_BITRATE=y

#
# Compile the latency statistics library
#
CONFIG_RTE_LIBRTE_LATENCY_STATS=y

#
# Compile librte_telemetry legacy support
#
CONFIG_RTE_LIBRTE_TELEMETRY=n

#
# Compile librte_rcu
#
CONFIG_RTE_LIBRTE_RCU=y
CONFIG_RTE_LIBRTE_RCU_DEBUG=n

#
# Compile librte_rib
#
CONFIG_RTE_LIBRTE_RIB=y

#
# Compile librte_fib
#
CONFIG_RTE_LIBRTE_FIB=y
CONFIG_RTE_LIBRTE_FIB_DEBUG=n

#
# Compile librte_lpm
#
CONFIG_RTE_LIBRTE_LPM=y
CONFIG_RTE_LIBRTE_LPM_DEBUG=n

#
# Compile librte_acl
#
CONFIG_RTE_LIBRTE_ACL=y
CONFIG_RTE_LIBRTE_ACL_DEBUG=n

#
# Compile librte_power
#
CONFIG_RTE_LIBRTE_POWER=n
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
CONFIG_RTE_MAX_LCORE_FREQS=64

#
# Compile librte_net
#
CONFIG_RTE_LIBRTE_NET=y

#
# Compile librte_ip_frag
#
CONFIG_RTE_LIBRTE_IP_FRAG=y
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n

#
# Compile GRO library
#
CONFIG_RTE_LIBRTE_GRO=y

#
# Compile GSO library
#
CONFIG_RTE_LIBRTE_GSO=y

#
# Compile librte_meter
#
CONFIG_RTE_LIBRTE_METER=y

#
# Compile librte_classify
#
CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=y

#
# Compile librte_sched
#
CONFIG_RTE_LIBRTE_SCHED=y
CONFIG_RTE_SCHED_DEBUG=n
CONFIG_RTE_SCHED_RED=n
CONFIG_RTE_SCHED_COLLECT_STATS=n
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
CONFIG_RTE_SCHED_VECTOR=n

#
# Compile the distributor library
#
CONFIG_RTE_LIBRTE_DISTRIBUTOR=y

#
# Compile the reorder library
#
CONFIG_RTE_LIBRTE_REORDER=y

#
# Compile librte_port
#
CONFIG_RTE_LIBRTE_PORT=y
CONFIG_RTE_PORT_STATS_COLLECT=n
CONFIG_RTE_PORT_PCAP=n

#
# Compile librte_table
#
CONFIG_RTE_LIBRTE_TABLE=y
CONFIG_RTE_TABLE_STATS_COLLECT=n

#
# Compile librte_pipeline
#
CONFIG_RTE_LIBRTE_PIPELINE=y
CONFIG_RTE_PIPELINE_STATS_COLLECT=n

#
# Compile librte_kni
#
CONFIG_RTE_LIBRTE_KNI=n
CONFIG_RTE_LIBRTE_PMD_KNI=n
CONFIG_RTE_KNI_KMOD=n
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y

#
# Compile the pdump library
#
CONFIG_RTE_LIBRTE_PDUMP=y

#
# Compile vhost user library
#
CONFIG_RTE_LIBRTE_VHOST=n
CONFIG_RTE_LIBRTE_VHOST_NUMA=n
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n

#
# Compile vhost PMD
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
#
CONFIG_RTE_LIBRTE_PMD_VHOST=n

#
# Compile IFC driver
# To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO
# should be enabled.
#
CONFIG_RTE_LIBRTE_IFC_PMD=n

#
# Compile librte_bpf
#
CONFIG_RTE_LIBRTE_BPF=y
# allow load BPF from ELF files (requires libelf)
CONFIG_RTE_LIBRTE_BPF_ELF=n

#
# Compile librte_ipsec
#
CONFIG_RTE_LIBRTE_IPSEC=y

#
# Compile librte_graph
#
CONFIG_RTE_LIBRTE_GRAPH=y
CONFIG_RTE_GRAPH_BURST_SIZE=256
CONFIG_RTE_LIBRTE_GRAPH_STATS=y

#
# Compile librte_node
#
CONFIG_RTE_LIBRTE_NODE=y

#
# Compile the test application
#
CONFIG_RTE_APP_TEST=y
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n

#
# Compile the procinfo application
#
CONFIG_RTE_PROC_INFO=n

#
# Compile the PMD test application
#
CONFIG_RTE_TEST_PMD=y
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n

#
# Compile the rte flow perf application
#
CONFIG_RTE_TEST_FLOW_PERF=y

#
# Compile the bbdev test application
#
CONFIG_RTE_TEST_BBDEV=y

#
# Compile the compression performance application
#
CONFIG_RTE_APP_COMPRESS_PERF=y

#
# Compile the crypto performance application
#
CONFIG_RTE_APP_CRYPTO_PERF=y

#
# Compile the eventdev application
#
CONFIG_RTE_APP_EVENTDEV=y