/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2014-2018 Broadcom
* All rights reserved.
*/
#include <inttypes.h>
#include <stdbool.h>
#include <rte_dev.h>
#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_malloc.h>
#include <rte_cycles.h>
#include <rte_alarm.h>
#include <rte_kvargs.h>
#include "bnxt.h"
#include "bnxt_filter.h"
#include "bnxt_hwrm.h"
#include "bnxt_irq.h"
#include "bnxt_ring.h"
#include "bnxt_rxq.h"
#include "bnxt_rxr.h"
#include "bnxt_stats.h"
#include "bnxt_txq.h"
#include "bnxt_txr.h"
#include "bnxt_vnic.h"
#include "hsi_struct_def_dpdk.h"
#include "bnxt_nvm_defs.h"
#define DRV_MODULE_NAME "bnxt"
static const char bnxt_version[] =
"Broadcom NetXtreme driver " DRV_MODULE_NAME;
int bnxt_logtype_driver;
/*
* The set of PCI devices this driver supports
*/
static const struct rte_pci_id bnxt_pci_id_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
BROADCOM_DEV_ID_STRATUS_NIC_VF1) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
BROADCOM_DEV_ID_STRATUS_NIC_VF2) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58804) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58808) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57508) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57504) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57502) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57500_VF1) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57500_VF2) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57508_MF1) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57504_MF1) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57502_MF1) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57508_MF2) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57504_MF2) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57502_MF2) },
{ .vendor_id = 0, /* sentinel */ },
};
#define BNXT_ETH_RSS_SUPPORT ( \
ETH_RSS_IPV4 | \
ETH_RSS_NONFRAG_IPV4_TCP | \
ETH_RSS_NONFRAG_IPV4_UDP | \
ETH_RSS_IPV6 | \
ETH_RSS_NONFRAG_IPV6_TCP | \
ETH_RSS_NONFRAG_IPV6_UDP)
#define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
DEV_TX_OFFLOAD_IPV4_CKSUM | \
DEV_TX_OFFLOAD_TCP_CKSUM | \
DEV_TX_OFFLOAD_UDP_CKSUM | \
DEV_TX_OFFLOAD_TCP_TSO | \
DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
DEV_TX_OFFLOAD_VXLAN_TNL_TSO | \
DEV_TX_OFFLOAD_GRE_TNL_TSO | \
DEV_TX_OFFLOAD_IPIP_TNL_TSO | \
DEV_TX_OFFLOAD_GENEVE_TNL_TSO | \
DEV_TX_OFFLOAD_QINQ_INSERT | \
DEV_TX_OFFLOAD_MULTI_SEGS)
#define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
DEV_RX_OFFLOAD_VLAN_STRIP | \
DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
DEV_RX_OFFLOAD_TCP_CKSUM | \
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
DEV_RX_OFFLOAD_JUMBO_FRAME | \
DEV_RX_OFFLOAD_KEEP_CRC | \
DEV_RX_OFFLOAD_VLAN_EXTEND | \
DEV_RX_OFFLOAD_TCP_LRO | \
DEV_RX_OFFLOAD_SCATTER | \
DEV_RX_OFFLOAD_RSS_HASH)
#define BNXT_DEVARG_TRUFLOW "host-based-truflow"
#define BNXT_DEVARG_FLOW_XSTAT "flow-xstat"
static const char *const bnxt_dev_args[] = {
BNXT_DEVARG_TRUFLOW,
BNXT_DEVARG_FLOW_XSTAT,
NULL
};
/*
* truflow == false to disable the feature
* truflow == true to enable the feature
*/
#define BNXT_DEVARG_TRUFLOW_INVALID(truflow) ((truflow) > 1)
/*
* flow_xstat == false to disable the feature
* flow_xstat == true to enable the feature
*/
#define BNXT_DEVARG_FLOW_XSTAT_INVALID(flow_xstat) ((flow_xstat) > 1)
static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
static int bnxt_init_resources(struct bnxt *bp, bool reconfig_dev);
static int bnxt_uninit_resources(struct bnxt *bp, bool reconfig_dev);
static void bnxt_cancel_fw_health_check(struct bnxt *bp);
static int bnxt_restore_vlan_filters(struct bnxt *bp);
static void bnxt_dev_recover(void *arg);
static void bnxt_free_error_recovery_info(struct bnxt *bp);
int is_bnxt_in_error(struct bnxt *bp)
{
if (bp->flags & BNXT_FLAG_FATAL_ERROR)
return -EIO;
if (bp->flags & BNXT_FLAG_FW_RESET)
return -EBUSY;
return 0;
}
/***********************/
/*
* High level utility functions
*/
static uint16_t bnxt_rss_ctxts(const struct bnxt *bp)
{
if (!BNXT_CHIP_THOR(bp))
return 1;
return RTE_ALIGN_MUL_CEIL(bp->rx_nr_rings,
BNXT_RSS_ENTRIES_PER_CTX_THOR) /
BNXT_RSS_ENTRIES_PER_CTX_THOR;
}
static uint16_t bnxt_rss_hash_tbl_size(const struct bnxt *bp)
{
if (!BNXT_CHIP_THOR(bp))
return HW_HASH_INDEX_SIZE;
return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_THOR;
}
static void bnxt_free_pf_info(struct bnxt *bp)
{
rte_free(bp->pf);
}
static void bnxt_free_link_info(struct bnxt *bp)
{
rte_free(bp->link_info);
}
static void bnxt_free_leds_info(struct bnxt *bp)
{
rte_free(bp->leds);
bp->leds = NULL;
}
static void bnxt_free_flow_stats_info(struct bnxt *bp)
{
rte_free(bp->flow_stat);
bp->flow_stat = NULL;
}
static void bnxt_free_cos_queues(struct bnxt *bp)
{
rte_free(bp->rx_cos_queue);
rte_free(bp->tx_cos_queue);
}
static void bnxt_free_mem(struct bnxt *bp, bool reconfig)
{
bnxt_free_flow_stats_info(bp);
bnxt_free_filter_mem(bp);
bnxt_free_vnic_attributes(bp);
bnxt_free_vnic_mem(bp);
/* tx/rx rings are configured as part of *_queue_setup callbacks.
* If the number of rings change across fw update,
* we don't have much choice except to warn the user.
*/
if (!reconfig) {
bnxt_free_stats(bp);
bnxt_free_tx_rings(bp);
bnxt_free_rx_rings(bp);
}
bnxt_free_async_cp_ring(bp);
bnxt_free_rxtx_nq_ring(bp);
rte_free(bp->grp_info);
bp->grp_info = NULL;
}
static int bnxt_alloc_pf_info(struct bnxt *bp)
{
bp->pf = rte_zmalloc("bnxt_pf_info", sizeof(struct bnxt_pf_info), 0);
if (bp->pf == NULL)
return -ENOMEM;
return 0;
}
static int bnxt_alloc_link_info(struct bnxt *bp)
{
bp->link_info =
rte_zmalloc("bnxt_link_info", sizeof(struct bnxt_link_info), 0);
if (bp->link_info == NULL)
return -ENOMEM;
return 0;
}
static int bnxt_alloc_leds_info(struct bnxt *bp)
{
bp->leds = rte_zmalloc("bnxt_leds",
BNXT_MAX_LED * sizeof(struct bnxt_led_info),
0);
if (bp->leds == NULL)
return -ENOMEM;
return 0;
}
static int bnxt_alloc_cos_queues(struct bnxt *bp)
{
bp->rx_cos_queue =
rte_zmalloc("bnxt_rx_cosq",
BNXT_COS_QUEUE_COUNT *
sizeof(struct bnxt_cos_queue_info),
0);
if (bp->rx_cos_queue == NULL)
return -ENOMEM;
bp->tx_cos_queue =
rte_zmalloc("bnxt_tx_cosq",
BNXT_COS_QUEUE_COUNT *
sizeof(struct bnxt_cos_queue_info),
0);
if (bp->tx_cos_queue == NULL)
return -ENOMEM;
return 0;
}
static int bnxt_alloc_flow_stats_info(struct bnxt *bp)
{
bp->flow_stat = rte_zmalloc("bnxt_flow_xstat",
sizeof(struct bnxt_flow_stat_info), 0);
if (bp->flow_stat == NULL)
return -ENOMEM;
return 0;
}
static int bnxt_alloc_mem(struct bnxt *bp, bool reconfig)
{
int rc;
rc = bnxt_alloc_ring_grps(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_async_ring_struct(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_vnic_mem(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_vnic_attributes(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_filter_mem(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_async_cp_ring(bp);
if (rc)
goto alloc_mem_err;
rc = bnxt_alloc_rxtx_nq_ring(bp);
if (rc)
goto alloc_mem_err;
if (BNXT_FLOW_XSTATS_EN(bp)) {
rc = bnxt_alloc_flow_stats_info(bp);
if (rc)
goto alloc_mem_err;
}
return 0;
alloc_mem_err:
bnxt_free_mem(bp, reconfig);
return rc;
}
static int bnxt_setup_one_vnic(struct bnxt *bp, uint16_t vnic_id)
{
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
uint64_t rx_offloads = dev_conf->rxmode.offloads;
struct bnxt_rx_queue *rxq;
unsigned int j;
int rc;
rc = bnxt_vnic_grp_alloc(bp, vnic);
if (rc)
goto err_out;
PMD_DRV_LOG(DEBUG, "vnic[%d] = %p vnic->fw_grp_ids = %p\n",
vnic_id, vnic, vnic->fw_grp_ids);
rc = bnxt_hwrm_vnic_alloc(bp, vnic);
if (rc)
goto err_out;
/* Alloc RSS context only if RSS mode is enabled */
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS) {
int j, nr_ctxs = bnxt_rss_ctxts(bp);
rc = 0;
for (j = 0; j < nr_ctxs; j++) {
rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic, j);
if (rc)
break;
}
if (rc) {
PMD_DRV_LOG(ERR,
"HWRM vnic %d ctx %d alloc failure rc: %x\n",
vnic_id, j, rc);
goto err_out;
}
vnic->num_lb_ctxts = nr_ctxs;
}
/*
* Firmware sets pf pair in default vnic cfg. If the VLAN strip
* setting is not available at this time, it will not be
* configured correctly in the CFA.
*/
if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
vnic->vlan_strip = true;
else
vnic->vlan_strip = false;
rc = bnxt_hwrm_vnic_cfg(bp, vnic);
if (rc)
goto err_out;
rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
if (rc)
goto err_out;
for (j = 0; j < bp->rx_num_qs_per_vnic; j++) {
rxq = bp->eth_dev->data->rx_queues[j];
PMD_DRV_LOG(DEBUG,
"rxq[%d]->vnic=%p vnic->fw_grp_ids=%p\n",
j, rxq->vnic, rxq->vnic->fw_grp_ids);
if (BNXT_HAS_RING_GRPS(bp) && rxq->rx_deferred_start)
rxq->vnic->fw_grp_ids[j] = INVALID_HW_RING_ID;
else
vnic->rx_queue_cnt++;
}
PMD_DRV_LOG(DEBUG, "vnic->rx_queue_cnt = %d\n", vnic->rx_queue_cnt);
rc = bnxt_vnic_rss_configure(bp, vnic);
if (rc)
goto err_out;
bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
else
bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
return 0;
err_out:
PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
vnic_id, rc);
return rc;
}
static int bnxt_register_fc_ctx_mem(struct bnxt *bp)
{
int rc = 0;
rc = bnxt_hwrm_ctx_rgtr(bp, bp->flow_stat->rx_fc_in_tbl.dma,
&bp->flow_stat->rx_fc_in_tbl.ctx_id);
if (rc)
return rc;
PMD_DRV_LOG(DEBUG,
"rx_fc_in_tbl.va = %p rx_fc_in_tbl.dma = %p"
" rx_fc_in_tbl.ctx_id = %d\n",
bp->flow_stat->rx_fc_in_tbl.va,
(void *)((uintptr_t)bp->flow_stat->rx_fc_in_tbl.dma),
bp->flow_stat->rx_fc_in_tbl.ctx_id);
rc = bnxt_hwrm_ctx_rgtr(bp, bp->flow_stat->rx_fc_out_tbl.dma,
&bp->flow_stat->rx_fc_out_tbl.ctx_id);
if (rc)
return rc;
PMD_DRV_LOG(DEBUG,
"rx_fc_out_tbl.va = %p rx_fc_out_tbl.dma = %p"
" rx_fc_out_tbl.ctx_id = %d\n",
bp->flow_stat->rx_fc_out_tbl.va,
(void *)((uintptr_t)bp->flow_stat->rx_fc_out_tbl.dma),
bp->flow_stat->rx_fc_out_tbl.ctx_id);
rc = bnxt_hwrm_ctx_rgtr(bp, bp->flow_stat->tx_fc_in_tbl.dma,
&bp->flow_stat->tx_fc_in_tbl.ctx_id);
if (rc)
return rc;
PMD_DRV_LOG(DEBUG,
"tx_fc_in_tbl.va = %p tx_fc_in_tbl.dma = %p"
" tx_fc_in_tbl.ctx_id = %d\n",
bp->flow_stat->tx_fc_in_tbl.va,
(void *)((uintptr_t)bp->flow_stat->tx_fc_in_tbl.dma),
bp->flow_stat->tx_fc_in_tbl.ctx_id);
rc = bnxt_hwrm_ctx_rgtr(bp, bp->flow_stat->tx_fc_out_tbl.dma,
&bp->flow_stat->tx_fc_out_tbl.ctx_id);
if (rc)
return rc;
PMD_DRV_LOG(DEBUG,
"tx_fc_out_tbl.va = %p tx_fc_out_tbl.dma = %p"
" tx_fc_out_tbl.ctx_id = %d\n",
bp->flow_stat->tx_fc_out_tbl.va,
(void *)((uintptr_t)bp->flow_stat->tx_fc_out_tbl.dma),
bp->flow_stat->tx_fc_out_tbl.ctx_id);
memset(bp->flow_stat->rx_fc_out_tbl.va,
0,
bp->flow_stat->rx_fc_out_tbl.size);
rc = bnxt_hwrm_cfa_counter_cfg(bp, BNXT_DIR_RX,
CFA_COUNTER_CFG_IN_COUNTER_TYPE_FC,
bp->flow_stat->rx_fc_out_tbl.ctx_id,
bp->flow_stat->max_fc,
true);
if (rc)
return rc;
memset(bp->flow_stat->tx_fc_out_tbl.va,
0,
bp->flow_stat->tx_fc_out_tbl.size);
rc = bnxt_hwrm_cfa_counter_cfg(bp, BNXT_DIR_TX,
CFA_COUNTER_CFG_IN_COUNTER_TYPE_FC,
bp->flow_stat->tx_fc_out_tbl.ctx_id,
bp->flow_stat->max_fc,
true);
return rc;
}
static int bnxt_alloc_ctx_mem_buf(char *type, size_t size,
struct bnxt_ctx_mem_buf_info *ctx)
{
if (!ctx)
return -EINVAL;
ctx->va = rte_zmalloc(type, size, 0);
if (ctx->va == NULL)
return -ENOMEM;
rte_mem_lock_page(ctx->va);
ctx->size = size;
ctx->dma = rte_mem_virt2iova(ctx->va);
if (ctx->dma == RTE_BAD_IOVA)
return -ENOMEM;
return 0;
}
static int bnxt_init_fc_ctx_mem(struct bnxt *bp)
{
struct rte_pci_device *pdev = bp->pdev;
char type[RTE_MEMZONE_NAMESIZE];
uint16_t max_fc;
int rc = 0;
max_fc = bp->flow_stat->max_fc;
sprintf(type, "bnxt_rx_fc_in_" PCI_PRI_FMT, pdev->addr.domain,
pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
/* 4 bytes for each counter-id */
rc = bnxt_alloc_ctx_mem_buf(type,
max_fc * 4,
&bp->flow_stat->rx_fc_in_tbl);
if (rc)
return rc;
sprintf(type, "bnxt_rx_fc_out_" PCI_PRI_FMT, pdev->addr.domain,
pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
/* 16 bytes for each counter - 8 bytes pkt_count, 8 bytes byte_count */
rc = bnxt_alloc_ctx_mem_buf(type,
max_fc * 16,
&bp->flow_stat->rx_fc_out_tbl);
if (rc)
return rc;
sprintf(type, "bnxt_tx_fc_in_" PCI_PRI_FMT, pdev->addr.domain,
pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
/* 4 bytes for each counter-id */
rc = bnxt_alloc_ctx_mem_buf(type,
max_fc * 4,
&bp->flow_stat->tx_fc_in_tbl);
if (rc)
return rc;
sprintf(type, "bnxt_tx_fc_out_" PCI_PRI_FMT, pdev->addr.domain,
pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
/* 16 bytes for each counter - 8 bytes pkt_count, 8 bytes byte_count */
rc = bnxt_alloc_ctx_mem_buf(type,
max_fc * 16,
&bp->flow_stat->tx_fc_out_tbl);
if (rc)
return rc;
rc = bnxt_register_fc_ctx_mem(bp);
return rc;
}
static int bnxt_init_ctx_mem(struct bnxt *bp)
{
int rc = 0;
if (!(bp->fw_cap & BNXT_FW_CAP_ADV_FLOW_COUNTERS) ||
!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp)) ||
!BNXT_FLOW_XSTATS_EN(bp))
return 0;
rc = bnxt_hwrm_cfa_counter_qcaps(bp, &bp->flow_stat->max_fc);
if (rc)
return rc;
rc = bnxt_init_fc_ctx_mem(bp);
return rc;
}
static int bnxt_init_chip(struct bnxt *bp)
{
struct rte_eth_link new;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
uint32_t intr_vector = 0;
uint32_t queue_id, base = BNXT_MISC_VEC_ID;
uint32_t vec = BNXT_MISC_VEC_ID;
unsigned int i, j;
int rc;
if (bp->eth_dev->data->mtu > RTE_ETHER_MTU) {
bp->eth_dev->data->dev_conf.rxmode.offloads |=
DEV_RX_OFFLOAD_JUMBO_FRAME;
bp->flags |= BNXT_FLAG_JUMBO;
} else {
bp->eth_dev->data->dev_conf.rxmode.offloads &=
~DEV_RX_OFFLOAD_JUMBO_FRAME;
bp->flags &= ~BNXT_FLAG_JUMBO;
}
/* THOR does not support ring groups.
* But we will use the array to save RSS context IDs.
*/
if (BNXT_CHIP_THOR(bp))
bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
goto err_out;
}
rc = bnxt_alloc_hwrm_rings(bp);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
goto err_out;
}
rc = bnxt_alloc_all_hwrm_ring_grps(bp);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
goto err_out;
}
if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY))
goto skip_cosq_cfg;
for (j = 0, i = 0; i < BNXT_COS_QUEUE_COUNT; i++) {
if (bp->rx_cos_queue[i].id != 0xff) {
struct bnxt_vnic_info *vnic = &bp->vnic_info[j++];
if (!vnic) {
PMD_DRV_LOG(ERR,
"Num pools more than FW profile\n");
rc = -EINVAL;
goto err_out;
}
vnic->cos_queue_id = bp->rx_cos_queue[i].id;
bp->rx_cosq_cnt++;
}
}
skip_cosq_cfg:
rc = bnxt_mq_rx_configure(bp);
if (rc) {
PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
goto err_out;
}
/* VNIC configuration */
for (i = 0; i < bp->nr_vnics; i++) {
rc = bnxt_setup_one_vnic(bp, i);
if (rc)
goto err_out;
}
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
if (rc) {
PMD_DRV_LOG(ERR,
"HWRM cfa l2 rx mask failure rc: %x\n", rc);
goto err_out;
}
/* check and configure queue intr-vector mapping */
if ((rte_intr_cap_multiple(intr_handle) ||
!RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = bp->eth_dev->data->nb_rx_queues;
PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
if (intr_vector > bp->rx_cp_nr_rings) {
PMD_DRV_LOG(ERR, "At most %d intr queues supported",
bp->rx_cp_nr_rings);
return -ENOTSUP;
}
rc = rte_intr_efd_enable(intr_handle, intr_vector);
if (rc)
return rc;
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
bp->eth_dev->data->nb_rx_queues *
sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", bp->eth_dev->data->nb_rx_queues);
rc = -ENOMEM;
goto err_disable;
}
PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
"intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
intr_handle->intr_vec, intr_handle->nb_efd,
intr_handle->max_intr);
for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
queue_id++) {
intr_handle->intr_vec[queue_id] =
vec + BNXT_RX_VEC_START;
if (vec < base + intr_handle->nb_efd - 1)
vec++;
}
}
/* enable uio/vfio intr/eventfd mapping */
rc = rte_intr_enable(intr_handle);
#ifndef RTE_EXEC_ENV_FREEBSD
/* In FreeBSD OS, nic_uio driver does not support interrupts */
if (rc)
goto err_free;
#endif
rc = bnxt_get_hwrm_link_config(bp, &new);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
goto err_free;
}
if (!bp->link_info->link_up) {
rc = bnxt_set_hwrm_link_config(bp, true);
if (rc) {
PMD_DRV_LOG(ERR,
"HWRM link config failure rc: %x\n", rc);
goto err_free;
}
}
bnxt_print_link_info(bp->eth_dev);
bp->mark_table = rte_zmalloc("bnxt_mark_table", BNXT_MARK_TABLE_SZ, 0);
if (!bp->mark_table)
PMD_DRV_LOG(ERR, "Allocation of mark table failed\n");
return 0;
err_free:
rte_free(intr_handle->intr_vec);
err_disable:
rte_intr_efd_disable(intr_handle);
err_out:
/* Some of the error status returned by FW may not be from errno.h */
if (rc > 0)
rc = -EIO;
return rc;
}
static int bnxt_shutdown_nic(struct bnxt *bp)
{
bnxt_free_all_hwrm_resources(bp);
bnxt_free_all_filters(bp);
bnxt_free_all_vnics(bp);
return 0;
}
/*
* Device configuration and status function
*/
static uint32_t bnxt_get_speed_capabilities(struct bnxt *bp)
{
uint32_t link_speed = bp->link_info->support_speeds;
uint32_t speed_capa = 0;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB)
speed_capa |= ETH_LINK_SPEED_100M;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD)
speed_capa |= ETH_LINK_SPEED_100M_HD;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB)
speed_capa |= ETH_LINK_SPEED_1G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB)
speed_capa |= ETH_LINK_SPEED_2_5G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
speed_capa |= ETH_LINK_SPEED_10G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB)
speed_capa |= ETH_LINK_SPEED_20G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB)
speed_capa |= ETH_LINK_SPEED_25G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB)
speed_capa |= ETH_LINK_SPEED_40G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB)
speed_capa |= ETH_LINK_SPEED_50G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
speed_capa |= ETH_LINK_SPEED_100G;
if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_200GB)
speed_capa |= ETH_LINK_SPEED_200G;
if (bp->link_info->auto_mode ==
HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE)
speed_capa |= ETH_LINK_SPEED_FIXED;
else
speed_capa |= ETH_LINK_SPEED_AUTONEG;
return speed_capa;
}
static int bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
struct rte_eth_dev_info *dev_info)
{
struct rte_pci_device *pdev = RTE_DEV_TO_PCI(eth_dev->device);
struct bnxt *bp = eth_dev->data->dev_private;
uint16_t max_vnics, i, j, vpool, vrxq;
unsigned int max_rx_rings;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* MAC Specifics */
dev_info->max_mac_addrs = bp->max_l2_ctx;
dev_info->max_hash_mac_addrs = 0;
/* PF/VF specifics */
if (BNXT_PF(bp))
dev_info->max_vfs = pdev->max_vfs;
max_rx_rings = BNXT_MAX_RINGS(bp);
/* For the sake of symmetry, max_rx_queues = max_tx_queues */
dev_info->max_rx_queues = max_rx_rings;
dev_info->max_tx_queues = max_rx_rings;
dev_info->reta_size = bnxt_rss_hash_tbl_size(bp);
dev_info->hash_key_size = 40;
max_vnics = bp->max_vnics;
/* MTU specifics */
dev_info->min_mtu = RTE_ETHER_MIN_MTU;
dev_info->max_mtu = BNXT_MAX_MTU;
/* Fast path specifics */
dev_info->min_rx_bufsize = 1;
dev_info->max_rx_pktlen = BNXT_MAX_PKT_LEN;
dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT;
dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
dev_info->speed_capa = bnxt_get_speed_capabilities(bp);
/* *INDENT-OFF* */
dev_info->default_rxconf = (struct rte_eth_rxconf) {
.rx_thresh = {
.pthresh = 8,
.hthresh = 8,
.wthresh = 0,
},
.rx_free_thresh = 32,
/* If no descriptors available, pkts are dropped by default */
.rx_drop_en = 1,
};
dev_info->default_txconf = (struct rte_eth_txconf) {
.tx_thresh = {
.pthresh = 32,
.hthresh = 0,
.wthresh = 0,
},
.tx_free_thresh = 32,
.tx_rs_thresh = 32,
};
eth_dev->data->dev_conf.intr_conf.lsc = 1;
eth_dev->data->dev_conf.intr_conf.rxq = 1;
dev_info->rx_desc_lim.nb_min = BNXT_MIN_RING_DESC;
dev_info->rx_desc_lim.nb_max = BNXT_MAX_RX_RING_DESC;
dev_info->tx_desc_lim.nb_min = BNXT_MIN_RING_DESC;
dev_info->tx_desc_lim.nb_max = BNXT_MAX_TX_RING_DESC;
/* *INDENT-ON* */
/*
* TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
* need further investigation.
*/
/* VMDq resources */
vpool = 64; /* ETH_64_POOLS */
vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
for (i = 0; i < 4; vpool >>= 1, i++) {
if (max_vnics > vpool) {
for (j = 0; j < 5; vrxq >>= 1, j++) {
if (dev_info->max_rx_queues > vrxq) {
if (vpool > vrxq)
vpool = vrxq;
goto found;
}
}
/* Not enough resources to support VMDq */
break;
}
}
/* Not enough resources to support VMDq */
vpool = 0;
vrxq = 0;
found:
dev_info->max_vmdq_pools = vpool;
dev_info->vmdq_queue_num = vrxq;
dev_info->vmdq_pool_base = 0;
dev_info->vmdq_queue_base = 0;
return 0;
}
/* Configure the device based on the configuration provided */
static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
int rc;
bp->rx_queues = (void *)eth_dev->data->rx_queues;
bp->tx_queues = (void *)eth_dev->data->tx_queues;
bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (BNXT_VF(bp) && (bp->flags & BNXT_FLAG_NEW_RM)) {
rc = bnxt_hwrm_check_vf_rings(bp);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM insufficient resources\n");
return -ENOSPC;
}
/* If a resource has already been allocated - in this case
* it is the async completion ring, free it. Reallocate it after
* resource reservation. This will ensure the resource counts
* are calculated correctly.
*/
pthread_mutex_lock(&bp->def_cp_lock);
if (!BNXT_HAS_NQ(bp) && bp->async_cp_ring) {
bnxt_disable_int(bp);
bnxt_free_cp_ring(bp, bp->async_cp_ring);
}
rc = bnxt_hwrm_func_reserve_vf_resc(bp, false);
if (rc) {
PMD_DRV_LOG(ERR, "HWRM resource alloc fail:%x\n", rc);
pthread_mutex_unlock(&bp->def_cp_lock);
return -ENOSPC;
}
if (!BNXT_HAS_NQ(bp) && bp->async_cp_ring) {
rc = bnxt_alloc_async_cp_ring(bp);
if (rc) {
pthread_mutex_unlock(&bp->def_cp_lock);
return rc;
}
bnxt_enable_int(bp);
}
pthread_mutex_unlock(&bp->def_cp_lock);
} else {
/* legacy driver needs to get updated values */
rc = bnxt_hwrm_func_qcaps(bp);
if (rc) {
PMD_DRV_LOG(ERR, "hwrm func qcaps fail:%d\n", rc);
return rc;
}
}
/* Inherit new configurations */
if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues
+ BNXT_NUM_ASYNC_CPR(bp) > bp->max_cp_rings ||
eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
bp->max_stat_ctx)
goto resource_error;
if (BNXT_HAS_RING_GRPS(bp) &&
(uint32_t)(eth_dev->data->nb_rx_queues) > bp->max_ring_grps)
goto resource_error;
if (!(eth_dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS) &&
bp->max_vnics < eth_dev->data->nb_rx_queues)
goto resource_error;
bp->rx_cp_nr_rings = bp->rx_nr_rings;
bp->tx_cp_nr_rings = bp->tx_nr_rings;
if (eth_dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
rx_offloads |= DEV_RX_OFFLOAD_RSS_HASH;
eth_dev->data->dev_conf.rxmode.offloads = rx_offloads;
if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
eth_dev->data->mtu =
eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN - VLAN_TAG_SIZE *
BNXT_NUM_VLANS;
bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
}
return 0;
resource_error:
PMD_DRV_LOG(ERR,
"Insufficient resources to support requested config\n");
PMD_DRV_LOG(ERR,
"Num Queues Requested: Tx %d, Rx %d\n",
eth_dev->data->nb_tx_queues,
eth_dev->data->nb_rx_queues);
PMD_DRV_LOG(ERR,
"MAX: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d, Vnic %d\n",
bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
bp->max_stat_ctx, bp->max_ring_grps, bp->max_vnics);
return -ENOSPC;
}
static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
{
struct rte_eth_link *link = ð_dev->data->dev_link;
if (link->link_status)
PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
eth_dev->data->port_id,
(uint32_t)link->link_speed,
(link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
("full-duplex") : ("half-duplex\n"));
else
PMD_DRV_LOG(INFO, "Port %d Link Down\n",
eth_dev->data->port_id);
}
/*
* Determine whether the current configuration requires support for scattered
* receive; return 1 if scattered receive is required and 0 if not.
*/
static int bnxt_scattered_rx(struct rte_eth_dev *eth_dev)
{
uint16_t buf_size;
int i;
if (eth_dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER)
return 1;
for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
struct bnxt_rx_queue *rxq = eth_dev->data->rx_queues[i];
buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
RTE_PKTMBUF_HEADROOM);
if (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len > buf_size)
return 1;
}
return 0;
}
static eth_rx_burst_t
bnxt_receive_function(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
#ifdef RTE_ARCH_X86
#ifndef RTE_LIBRTE_IEEE1588
/*
* Vector mode receive can be enabled only if scatter rx is not
* in use and rx offloads are limited to VLAN stripping and
* CRC stripping.
*/
if (!eth_dev->data->scattered_rx &&
!(eth_dev->data->dev_conf.rxmode.offloads &
~(DEV_RX_OFFLOAD_VLAN_STRIP |
DEV_RX_OFFLOAD_KEEP_CRC |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
DEV_RX_OFFLOAD_RSS_HASH |
DEV_RX_OFFLOAD_VLAN_FILTER)) &&
!BNXT_TRUFLOW_EN(bp)) {
PMD_DRV_LOG(INFO, "Using vector mode receive for port %d\n",
eth_dev->data->port_id);
bp->flags |= BNXT_FLAG_RX_VECTOR_PKT_MODE;
return bnxt_recv_pkts_vec;
}
PMD_DRV_LOG(INFO, "Vector mode receive disabled for port %d\n",
eth_dev->data->port_id);
PMD_DRV_LOG(INFO,
"Port %d scatter: %d rx offload: %" PRIX64 "\n",
eth_dev->data->port_id,
eth_dev->data->scattered_rx,
eth_dev->data->dev_conf.rxmode.offloads);
#endif
#endif
bp->flags &= ~BNXT_FLAG_RX_VECTOR_PKT_MODE;
return bnxt_recv_pkts;
}
static eth_tx_burst_t
bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev)
{
#ifdef RTE_ARCH_X86
#ifndef RTE_LIBRTE_IEEE1588
/*
* Vector mode transmit can be enabled only if not using scatter rx
* or tx offloads.
*/
if (!eth_dev->data->scattered_rx &&
!eth_dev->data->dev_conf.txmode.offloads) {
PMD_DRV_LOG(INFO, "Using vector mode transmit for port %d\n",
eth_dev->data->port_id);
return bnxt_xmit_pkts_vec;
}
PMD_DRV_LOG(INFO, "Vector mode transmit disabled for port %d\n",
eth_dev->data->port_id);
PMD_DRV_LOG(INFO,
"Port %d scatter: %d tx offload: %" PRIX64 "\n",
eth_dev->data->port_id,
eth_dev->data->scattered_rx,
eth_dev->data->dev_conf.txmode.offloads);
#endif
#endif
return bnxt_xmit_pkts;
}
static int bnxt_handle_if_change_status(struct bnxt *bp)
{
int rc;
/* Since fw has undergone a reset and lost all contexts,
* set fatal flag to not issue hwrm during cleanup
*/
bp->flags |= BNXT_FLAG_FATAL_ERROR;
bnxt_uninit_resources(bp, true);
/* clear fatal flag so that re-init happens */
bp->flags &= ~BNXT_FLAG_FATAL_ERROR;
rc = bnxt_init_resources(bp, true);
bp->flags &= ~BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE;
return rc;
}
static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
int vlan_mask = 0;
int rc, retry_cnt = BNXT_IF_CHANGE_RETRY_COUNT;
if (!eth_dev->data->nb_tx_queues || !eth_dev->data->nb_rx_queues) {
PMD_DRV_LOG(ERR, "Queues are not configured yet!\n");
return -EINVAL;
}
if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
PMD_DRV_LOG(ERR,
"RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
}
do {
rc = bnxt_hwrm_if_change(bp, true);
if (rc == 0 || rc != -EAGAIN)
break;
rte_delay_ms(BNXT_IF_CHANGE_RETRY_INTERVAL);
} while (retry_cnt--);
if (rc)
return rc;
if (bp->flags & BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE) {
rc = bnxt_handle_if_change_status(bp);
if (rc)
return rc;
}
bnxt_enable_int(bp);
rc = bnxt_init_chip(bp);
if (rc)
goto error;
eth_dev->data->scattered_rx = bnxt_scattered_rx(eth_dev);
eth_dev->data->dev_started = 1;
bnxt_link_update(eth_dev, 1, ETH_LINK_UP);
if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
vlan_mask |= ETH_VLAN_FILTER_MASK;
if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
vlan_mask |= ETH_VLAN_STRIP_MASK;
rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
if (rc)
goto error;
eth_dev->rx_pkt_burst = bnxt_receive_function(eth_dev);
eth_dev->tx_pkt_burst = bnxt_transmit_function(eth_dev);
pthread_mutex_lock(&bp->def_cp_lock);
bnxt_schedule_fw_health_check(bp);
pthread_mutex_unlock(&bp->def_cp_lock);
if (BNXT_TRUFLOW_EN(bp))
bnxt_ulp_init(bp);
return 0;
error:
bnxt_shutdown_nic(bp);
bnxt_free_tx_mbufs(bp);
bnxt_free_rx_mbufs(bp);
bnxt_hwrm_if_change(bp, false);
eth_dev->data->dev_started = 0;
return rc;
}
static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
int rc = 0;
if (!bp->link_info->link_up)
rc = bnxt_set_hwrm_link_config(bp, true);
if (!rc)
eth_dev->data->dev_link.link_status = 1;
bnxt_print_link_info(eth_dev);
return rc;
}
static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
eth_dev->data->dev_link.link_status = 0;
bnxt_set_hwrm_link_config(bp, false);
bp->link_info->link_up = 0;
return 0;
}
/* Unload the driver, release resources */
static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
if (BNXT_TRUFLOW_EN(bp))
bnxt_ulp_deinit(bp);
eth_dev->data->dev_started = 0;
/* Prevent crashes when queues are still in use */
eth_dev->rx_pkt_burst = &bnxt_dummy_recv_pkts;
eth_dev->tx_pkt_burst = &bnxt_dummy_xmit_pkts;
bnxt_disable_int(bp);
/* disable uio/vfio intr/eventfd mapping */
rte_intr_disable(intr_handle);
bnxt_cancel_fw_health_check(bp);
bnxt_dev_set_link_down_op(eth_dev);
/* Wait for link to be reset and the async notification to process.
* During reset recovery, there is no need to wait and
* VF/NPAR functions do not have privilege to change PHY config.
*/
if (!is_bnxt_in_error(bp) && BNXT_SINGLE_PF(bp))
bnxt_link_update(eth_dev, 1, ETH_LINK_DOWN);
/* Clean queue intr-vector mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
rte_free(intr_handle->intr_vec);
intr_handle->intr_vec = NULL;
}
bnxt_hwrm_port_clr_stats(bp);
bnxt_free_tx_mbufs(bp);
bnxt_free_rx_mbufs(bp);
/* Process any remaining notifications in default completion queue */
bnxt_int_handler(eth_dev);
bnxt_shutdown_nic(bp);
bnxt_hwrm_if_change(bp, false);
rte_free(bp->mark_table);
bp->mark_table = NULL;
bp->flags &= ~BNXT_FLAG_RX_VECTOR_PKT_MODE;
bp->rx_cosq_cnt = 0;
/* All filters are deleted on a port stop. */
if (BNXT_FLOW_XSTATS_EN(bp))
bp->flow_stat->flow_count = 0;
}
static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
/* cancel the recovery handler before remove dev */
rte_eal_alarm_cancel(bnxt_dev_reset_and_resume, (void *)bp);
rte_eal_alarm_cancel(bnxt_dev_recover, (void *)bp);
bnxt_cancel_fc_thread(bp);
if (eth_dev->data->dev_started)
bnxt_dev_stop_op(eth_dev);
bnxt_uninit_resources(bp, false);
bnxt_free_leds_info(bp);
bnxt_free_cos_queues(bp);
bnxt_free_link_info(bp);
bnxt_free_pf_info(bp);
eth_dev->dev_ops = NULL;
eth_dev->rx_pkt_burst = NULL;
eth_dev->tx_pkt_burst = NULL;
rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
bp->tx_mem_zone = NULL;
rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
bp->rx_mem_zone = NULL;
rte_free(bp->pf->vf_info);
bp->pf->vf_info = NULL;
rte_free(bp->grp_info);
bp->grp_info = NULL;
}
static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
uint32_t index)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
struct bnxt_vnic_info *vnic;
struct bnxt_filter_info *filter, *temp_filter;
uint32_t i;
if (is_bnxt_in_error(bp))
return;
/*
* Loop through all VNICs from the specified filter flow pools to
* remove the corresponding MAC addr filter
*/
for (i = 0; i < bp->nr_vnics; i++) {
if (!(pool_mask & (1ULL << i)))
continue;
vnic = &bp->vnic_info[i];
filter = STAILQ_FIRST(&vnic->filter);
while (filter) {
temp_filter = STAILQ_NEXT(filter, next);
if (filter->mac_index == index) {
STAILQ_REMOVE(&vnic->filter, filter,
bnxt_filter_info, next);
bnxt_hwrm_clear_l2_filter(bp, filter);
bnxt_free_filter(bp, filter);
}
filter = temp_filter;
}
}
}
static int bnxt_add_mac_filter(struct bnxt *bp, struct bnxt_vnic_info *vnic,
struct rte_ether_addr *mac_addr, uint32_t index,
uint32_t pool)
{
struct bnxt_filter_info *filter;
int rc = 0;
/* Attach requested MAC address to the new l2_filter */
STAILQ_FOREACH(filter, &vnic->filter, next) {
if (filter->mac_index == index) {
PMD_DRV_LOG(DEBUG,
"MAC addr already existed for pool %d\n",
pool);
return 0;
}
}
filter = bnxt_alloc_filter(bp);
if (!filter) {
PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
return -ENODEV;
}
/* bnxt_alloc_filter copies default MAC to filter->l2_addr. So,
* if the MAC that's been programmed now is a different one, then,
* copy that addr to filter->l2_addr
*/
if (mac_addr)
memcpy(filter->l2_addr, mac_addr, RTE_ETHER_ADDR_LEN);
filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
if (!rc) {
filter->mac_index = index;
if (filter->mac_index == 0)
STAILQ_INSERT_HEAD(&vnic->filter, filter, next);
else
STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
} else {
bnxt_free_filter(bp, filter);
}
return rc;
}
static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
struct rte_ether_addr *mac_addr,
uint32_t index, uint32_t pool)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic = &bp->vnic_info[pool];
int rc = 0;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (BNXT_VF(bp) & !BNXT_VF_IS_TRUSTED(bp)) {
PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
return -ENOTSUP;
}
if (!vnic) {
PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
return -EINVAL;
}
/* Filter settings will get applied when port is started */
if (!eth_dev->data->dev_started)
return 0;
rc = bnxt_add_mac_filter(bp, vnic, mac_addr, index, pool);
return rc;
}
int bnxt_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete,
bool exp_link_status)
{
int rc = 0;
struct bnxt *bp = eth_dev->data->dev_private;
struct rte_eth_link new;
int cnt = exp_link_status ? BNXT_LINK_UP_WAIT_CNT :
BNXT_LINK_DOWN_WAIT_CNT;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
memset(&new, 0, sizeof(new));
do {
/* Retrieve link info from hardware */
rc = bnxt_get_hwrm_link_config(bp, &new);
if (rc) {
new.link_speed = ETH_LINK_SPEED_100M;
new.link_duplex = ETH_LINK_FULL_DUPLEX;
PMD_DRV_LOG(ERR,
"Failed to retrieve link rc = 0x%x!\n", rc);
goto out;
}
if (!wait_to_complete || new.link_status == exp_link_status)
break;
rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
} while (cnt--);
out:
/* Timed out or success */
if (new.link_status != eth_dev->data->dev_link.link_status ||
new.link_speed != eth_dev->data->dev_link.link_speed) {
rte_eth_linkstatus_set(eth_dev, &new);
_rte_eth_dev_callback_process(eth_dev,
RTE_ETH_EVENT_INTR_LSC,
NULL);
bnxt_print_link_info(eth_dev);
}
return rc;
}
static int bnxt_link_update_op(struct rte_eth_dev *eth_dev,
int wait_to_complete)
{
return bnxt_link_update(eth_dev, wait_to_complete, ETH_LINK_UP);
}
static int bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic;
uint32_t old_flags;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Filter settings will get applied when port is started */
if (!eth_dev->data->dev_started)
return 0;
if (bp->vnic_info == NULL)
return 0;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
old_flags = vnic->flags;
vnic->flags |= BNXT_VNIC_INFO_PROMISC;
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
if (rc != 0)
vnic->flags = old_flags;
return rc;
}
static int bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic;
uint32_t old_flags;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Filter settings will get applied when port is started */
if (!eth_dev->data->dev_started)
return 0;
if (bp->vnic_info == NULL)
return 0;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
old_flags = vnic->flags;
vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
if (rc != 0)
vnic->flags = old_flags;
return rc;
}
static int bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic;
uint32_t old_flags;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Filter settings will get applied when port is started */
if (!eth_dev->data->dev_started)
return 0;
if (bp->vnic_info == NULL)
return 0;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
old_flags = vnic->flags;
vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
if (rc != 0)
vnic->flags = old_flags;
return rc;
}
static int bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic;
uint32_t old_flags;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Filter settings will get applied when port is started */
if (!eth_dev->data->dev_started)
return 0;
if (bp->vnic_info == NULL)
return 0;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
old_flags = vnic->flags;
vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
if (rc != 0)
vnic->flags = old_flags;
return rc;
}
/* Return bnxt_rx_queue pointer corresponding to a given rxq. */
static struct bnxt_rx_queue *bnxt_qid_to_rxq(struct bnxt *bp, uint16_t qid)
{
if (qid >= bp->rx_nr_rings)
return NULL;
return bp->eth_dev->data->rx_queues[qid];
}
/* Return rxq corresponding to a given rss table ring/group ID. */
static uint16_t bnxt_rss_to_qid(struct bnxt *bp, uint16_t fwr)
{
struct bnxt_rx_queue *rxq;
unsigned int i;
if (!BNXT_HAS_RING_GRPS(bp)) {
for (i = 0; i < bp->rx_nr_rings; i++) {
rxq = bp->eth_dev->data->rx_queues[i];
if (rxq->rx_ring->rx_ring_struct->fw_ring_id == fwr)
return rxq->index;
}
} else {
for (i = 0; i < bp->rx_nr_rings; i++) {
if (bp->grp_info[i].fw_grp_id == fwr)
return i;
}
}
return INVALID_HW_RING_ID;
}
static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
struct rte_eth_rss_reta_entry64 *reta_conf,
uint16_t reta_size)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct bnxt_vnic_info *vnic = BNXT_GET_DEFAULT_VNIC(bp);
uint16_t tbl_size = bnxt_rss_hash_tbl_size(bp);
uint16_t idx, sft;
int i, rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (!vnic->rss_table)
return -EINVAL;
if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
return -EINVAL;
if (reta_size != tbl_size) {
PMD_DRV_LOG(ERR, "The configured hash table lookup size "
"(%d) must equal the size supported by the hardware "
"(%d)\n", reta_size, tbl_size);
return -EINVAL;
}
for (i = 0; i < reta_size; i++) {
struct bnxt_rx_queue *rxq;
idx = i / RTE_RETA_GROUP_SIZE;
sft = i % RTE_RETA_GROUP_SIZE;
if (!(reta_conf[idx].mask & (1ULL << sft)))
continue;
rxq = bnxt_qid_to_rxq(bp, reta_conf[idx].reta[sft]);
if (!rxq) {
PMD_DRV_LOG(ERR, "Invalid ring in reta_conf.\n");
return -EINVAL;
}
if (BNXT_CHIP_THOR(bp)) {
vnic->rss_table[i * 2] =
rxq->rx_ring->rx_ring_struct->fw_ring_id;
vnic->rss_table[i * 2 + 1] =
rxq->cp_ring->cp_ring_struct->fw_ring_id;
} else {
vnic->rss_table[i] =
vnic->fw_grp_ids[reta_conf[idx].reta[sft]];
}
}
bnxt_hwrm_vnic_rss_cfg(bp, vnic);
return 0;
}
static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
struct rte_eth_rss_reta_entry64 *reta_conf,
uint16_t reta_size)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic = BNXT_GET_DEFAULT_VNIC(bp);
uint16_t tbl_size = bnxt_rss_hash_tbl_size(bp);
uint16_t idx, sft, i;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Retrieve from the default VNIC */
if (!vnic)
return -EINVAL;
if (!vnic->rss_table)
return -EINVAL;
if (reta_size != tbl_size) {
PMD_DRV_LOG(ERR, "The configured hash table lookup size "
"(%d) must equal the size supported by the hardware "
"(%d)\n", reta_size, tbl_size);
return -EINVAL;
}
for (idx = 0, i = 0; i < reta_size; i++) {
idx = i / RTE_RETA_GROUP_SIZE;
sft = i % RTE_RETA_GROUP_SIZE;
if (reta_conf[idx].mask & (1ULL << sft)) {
uint16_t qid;
if (BNXT_CHIP_THOR(bp))
qid = bnxt_rss_to_qid(bp,
vnic->rss_table[i * 2]);
else
qid = bnxt_rss_to_qid(bp, vnic->rss_table[i]);
if (qid == INVALID_HW_RING_ID) {
PMD_DRV_LOG(ERR, "Inv. entry in rss table.\n");
return -EINVAL;
}
reta_conf[idx].reta[sft] = qid;
}
}
return 0;
}
static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
struct rte_eth_rss_conf *rss_conf)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct bnxt_vnic_info *vnic;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/*
* If RSS enablement were different than dev_configure,
* then return -EINVAL
*/
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
if (!rss_conf->rss_hf)
PMD_DRV_LOG(ERR, "Hash type NONE\n");
} else {
if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
return -EINVAL;
}
bp->flags |= BNXT_FLAG_UPDATE_HASH;
memcpy(ð_dev->data->dev_conf.rx_adv_conf.rss_conf,
rss_conf,
sizeof(*rss_conf));
/* Update the default RSS VNIC(s) */
vnic = BNXT_GET_DEFAULT_VNIC(bp);
vnic->hash_type = bnxt_rte_to_hwrm_hash_types(rss_conf->rss_hf);
/*
* If hashkey is not specified, use the previously configured
* hashkey
*/
if (!rss_conf->rss_key)
goto rss_config;
if (rss_conf->rss_key_len != HW_HASH_KEY_SIZE) {
PMD_DRV_LOG(ERR,
"Invalid hashkey length, should be 16 bytes\n");
return -EINVAL;
}
memcpy(vnic->rss_hash_key, rss_conf->rss_key, rss_conf->rss_key_len);
rss_config:
bnxt_hwrm_vnic_rss_cfg(bp, vnic);
return 0;
}
static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
struct rte_eth_rss_conf *rss_conf)
{
struct bnxt *bp = eth_dev->data->dev_private;
struct bnxt_vnic_info *vnic = BNXT_GET_DEFAULT_VNIC(bp);
int len, rc;
uint32_t hash_types;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* RSS configuration is the same for all VNICs */
if (vnic && vnic->rss_hash_key) {
if (rss_conf->rss_key) {
len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
}
hash_types = vnic->hash_type;
rss_conf->rss_hf = 0;
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
rss_conf->rss_hf |= ETH_RSS_IPV4;
hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
}
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
hash_types &=
~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
}
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
hash_types &=
~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
}
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
rss_conf->rss_hf |= ETH_RSS_IPV6;
hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
}
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
hash_types &=
~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
}
if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
hash_types &=
~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
}
if (hash_types) {
PMD_DRV_LOG(ERR,
"Unknown RSS config from firmware (%08x), RSS disabled",
vnic->hash_type);
return -ENOTSUP;
}
} else {
rss_conf->rss_hf = 0;
}
return 0;
}
static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
struct rte_eth_fc_conf *fc_conf)
{
struct bnxt *bp = dev->data->dev_private;
struct rte_eth_link link_info;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
rc = bnxt_get_hwrm_link_config(bp, &link_info);
if (rc)
return rc;
memset(fc_conf, 0, sizeof(*fc_conf));
if (bp->link_info->auto_pause)
fc_conf->autoneg = 1;
switch (bp->link_info->pause) {
case 0:
fc_conf->mode = RTE_FC_NONE;
break;
case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
fc_conf->mode = RTE_FC_TX_PAUSE;
break;
case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
fc_conf->mode = RTE_FC_RX_PAUSE;
break;
case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
fc_conf->mode = RTE_FC_FULL;
break;
}
return 0;
}
static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
struct rte_eth_fc_conf *fc_conf)
{
struct bnxt *bp = dev->data->dev_private;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
return -ENOTSUP;
}
switch (fc_conf->mode) {
case RTE_FC_NONE:
bp->link_info->auto_pause = 0;
bp->link_info->force_pause = 0;
break;
case RTE_FC_RX_PAUSE:
if (fc_conf->autoneg) {
bp->link_info->auto_pause =
HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
bp->link_info->force_pause = 0;
} else {
bp->link_info->auto_pause = 0;
bp->link_info->force_pause =
HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
}
break;
case RTE_FC_TX_PAUSE:
if (fc_conf->autoneg) {
bp->link_info->auto_pause =
HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
bp->link_info->force_pause = 0;
} else {
bp->link_info->auto_pause = 0;
bp->link_info->force_pause =
HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
}
break;
case RTE_FC_FULL:
if (fc_conf->autoneg) {
bp->link_info->auto_pause =
HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
bp->link_info->force_pause = 0;
} else {
bp->link_info->auto_pause = 0;
bp->link_info->force_pause =
HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
}
break;
}
return bnxt_set_hwrm_link_config(bp, true);
}
/* Add UDP tunneling port */
static int
bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
struct rte_eth_udp_tunnel *udp_tunnel)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint16_t tunnel_type = 0;
int rc = 0;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
switch (udp_tunnel->prot_type) {
case RTE_TUNNEL_TYPE_VXLAN:
if (bp->vxlan_port_cnt) {
PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
udp_tunnel->udp_port);
if (bp->vxlan_port != udp_tunnel->udp_port) {
PMD_DRV_LOG(ERR, "Only one port allowed\n");
return -ENOSPC;
}
bp->vxlan_port_cnt++;
return 0;
}
tunnel_type =
HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
bp->vxlan_port_cnt++;
break;
case RTE_TUNNEL_TYPE_GENEVE:
if (bp->geneve_port_cnt) {
PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
udp_tunnel->udp_port);
if (bp->geneve_port != udp_tunnel->udp_port) {
PMD_DRV_LOG(ERR, "Only one port allowed\n");
return -ENOSPC;
}
bp->geneve_port_cnt++;
return 0;
}
tunnel_type =
HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
bp->geneve_port_cnt++;
break;
default:
PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
return -ENOTSUP;
}
rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
tunnel_type);
return rc;
}
static int
bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
struct rte_eth_udp_tunnel *udp_tunnel)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint16_t tunnel_type = 0;
uint16_t port = 0;
int rc = 0;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
switch (udp_tunnel->prot_type) {
case RTE_TUNNEL_TYPE_VXLAN:
if (!bp->vxlan_port_cnt) {
PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
return -EINVAL;
}
if (bp->vxlan_port != udp_tunnel->udp_port) {
PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
udp_tunnel->udp_port, bp->vxlan_port);
return -EINVAL;
}
if (--bp->vxlan_port_cnt)
return 0;
tunnel_type =
HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
port = bp->vxlan_fw_dst_port_id;
break;
case RTE_TUNNEL_TYPE_GENEVE:
if (!bp->geneve_port_cnt) {
PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
return -EINVAL;
}
if (bp->geneve_port != udp_tunnel->udp_port) {
PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
udp_tunnel->udp_port, bp->geneve_port);
return -EINVAL;
}
if (--bp->geneve_port_cnt)
return 0;
tunnel_type =
HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
port = bp->geneve_fw_dst_port_id;
break;
default:
PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
return -ENOTSUP;
}
rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
if (!rc) {
if (tunnel_type ==
HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
bp->vxlan_port = 0;
if (tunnel_type ==
HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
bp->geneve_port = 0;
}
return rc;
}
static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
{
struct bnxt_filter_info *filter;
struct bnxt_vnic_info *vnic;
int rc = 0;
uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
filter = STAILQ_FIRST(&vnic->filter);
while (filter) {
/* Search for this matching MAC+VLAN filter */
if (bnxt_vlan_filter_exists(bp, filter, chk, vlan_id)) {
/* Delete the filter */
rc = bnxt_hwrm_clear_l2_filter(bp, filter);
if (rc)
return rc;
STAILQ_REMOVE(&vnic->filter, filter,
bnxt_filter_info, next);
bnxt_free_filter(bp, filter);
PMD_DRV_LOG(INFO,
"Deleted vlan filter for %d\n",
vlan_id);
return 0;
}
filter = STAILQ_NEXT(filter, next);
}
return -ENOENT;
}
static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
{
struct bnxt_filter_info *filter;
struct bnxt_vnic_info *vnic;
int rc = 0;
uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN |
HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK;
uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN;
/* Implementation notes on the use of VNIC in this command:
*
* By default, these filters belong to default vnic for the function.
* Once these filters are set up, only destination VNIC can be modified.
* If the destination VNIC is not specified in this command,
* then the HWRM shall only create an l2 context id.
*/
vnic = BNXT_GET_DEFAULT_VNIC(bp);
filter = STAILQ_FIRST(&vnic->filter);
/* Check if the VLAN has already been added */
while (filter) {
if (bnxt_vlan_filter_exists(bp, filter, chk, vlan_id))
return -EEXIST;
filter = STAILQ_NEXT(filter, next);
}
/* No match found. Alloc a fresh filter and issue the L2_FILTER_ALLOC
* command to create MAC+VLAN filter with the right flags, enables set.
*/
filter = bnxt_alloc_filter(bp);
if (!filter) {
PMD_DRV_LOG(ERR,
"MAC/VLAN filter alloc failed\n");
return -ENOMEM;
}
/* MAC + VLAN ID filter */
/* If l2_ivlan == 0 and l2_ivlan_mask != 0, only
* untagged packets are received
*
* If l2_ivlan != 0 and l2_ivlan_mask != 0, untagged
* packets and only the programmed vlan's packets are received
*/
filter->l2_ivlan = vlan_id;
filter->l2_ivlan_mask = 0x0FFF;
filter->enables |= en;
filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
if (rc) {
/* Free the newly allocated filter as we were
* not able to create the filter in hardware.
*/
bnxt_free_filter(bp, filter);
return rc;
}
filter->mac_index = 0;
/* Add this new filter to the list */
if (vlan_id == 0)
STAILQ_INSERT_HEAD(&vnic->filter, filter, next);
else
STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
PMD_DRV_LOG(INFO,
"Added Vlan filter for %d\n", vlan_id);
return rc;
}
static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
uint16_t vlan_id, int on)
{
struct bnxt *bp = eth_dev->data->dev_private;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (!eth_dev->data->dev_started) {
PMD_DRV_LOG(ERR, "port must be started before setting vlan\n");
return -EINVAL;
}
/* These operations apply to ALL existing MAC/VLAN filters */
if (on)
return bnxt_add_vlan_filter(bp, vlan_id);
else
return bnxt_del_vlan_filter(bp, vlan_id);
}
static int bnxt_del_dflt_mac_filter(struct bnxt *bp,
struct bnxt_vnic_info *vnic)
{
struct bnxt_filter_info *filter;
int rc;
filter = STAILQ_FIRST(&vnic->filter);
while (filter) {
if (filter->mac_index == 0 &&
!memcmp(filter->l2_addr, bp->mac_addr,
RTE_ETHER_ADDR_LEN)) {
rc = bnxt_hwrm_clear_l2_filter(bp, filter);
if (!rc) {
STAILQ_REMOVE(&vnic->filter, filter,
bnxt_filter_info, next);
bnxt_free_filter(bp, filter);
}
return rc;
}
filter = STAILQ_NEXT(filter, next);
}
return 0;
}
static int
bnxt_config_vlan_hw_filter(struct bnxt *bp, uint64_t rx_offloads)
{
struct bnxt_vnic_info *vnic;
unsigned int i;
int rc;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
if (!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
/* Remove any VLAN filters programmed */
for (i = 0; i < RTE_ETHER_MAX_VLAN_ID; i++)
bnxt_del_vlan_filter(bp, i);
rc = bnxt_add_mac_filter(bp, vnic, NULL, 0, 0);
if (rc)
return rc;
} else {
/* Default filter will allow packets that match the
* dest mac. So, it has to be deleted, otherwise, we
* will endup receiving vlan packets for which the
* filter is not programmed, when hw-vlan-filter
* configuration is ON
*/
bnxt_del_dflt_mac_filter(bp, vnic);
/* This filter will allow only untagged packets */
bnxt_add_vlan_filter(bp, 0);
}
PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
!!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER));
return 0;
}
static int bnxt_free_one_vnic(struct bnxt *bp, uint16_t vnic_id)
{
struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
unsigned int i;
int rc;
/* Destroy vnic filters and vnic */
if (bp->eth_dev->data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_FILTER) {
for (i = 0; i < RTE_ETHER_MAX_VLAN_ID; i++)
bnxt_del_vlan_filter(bp, i);
}
bnxt_del_dflt_mac_filter(bp, vnic);
rc = bnxt_hwrm_vnic_free(bp, vnic);
if (rc)
return rc;
rte_free(vnic->fw_grp_ids);
vnic->fw_grp_ids = NULL;
vnic->rx_queue_cnt = 0;
return 0;
}
static int
bnxt_config_vlan_hw_stripping(struct bnxt *bp, uint64_t rx_offloads)
{
struct bnxt_vnic_info *vnic = BNXT_GET_DEFAULT_VNIC(bp);
int rc;
/* Destroy, recreate and reconfigure the default vnic */
rc = bnxt_free_one_vnic(bp, 0);
if (rc)
return rc;
/* default vnic 0 */
rc = bnxt_setup_one_vnic(bp, 0);
if (rc)
return rc;
if (bp->eth_dev->data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_FILTER) {
rc = bnxt_add_vlan_filter(bp, 0);
if (rc)
return rc;
rc = bnxt_restore_vlan_filters(bp);
if (rc)
return rc;
} else {
rc = bnxt_add_mac_filter(bp, vnic, NULL, 0, 0);
if (rc)
return rc;
}
rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
if (rc)
return rc;
PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
!!(rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP));
return rc;
}
static int
bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
{
uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
struct bnxt *bp = dev->data->dev_private;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Filter settings will get applied when port is started */
if (!dev->data->dev_started)
return 0;
if (mask & ETH_VLAN_FILTER_MASK) {
/* Enable or disable VLAN filtering */
rc = bnxt_config_vlan_hw_filter(bp, rx_offloads);
if (rc)
return rc;
}
if (mask & ETH_VLAN_STRIP_MASK) {
/* Enable or disable VLAN stripping */
rc = bnxt_config_vlan_hw_stripping(bp, rx_offloads);
if (rc)
return rc;
}
if (mask & ETH_VLAN_EXTEND_MASK) {
if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
PMD_DRV_LOG(DEBUG, "Extend VLAN supported\n");
else
PMD_DRV_LOG(INFO, "Extend VLAN unsupported\n");
}
return 0;
}
static int
bnxt_vlan_tpid_set_op(struct rte_eth_dev *dev, enum rte_vlan_type vlan_type,
uint16_t tpid)
{
struct bnxt *bp = dev->data->dev_private;
int qinq = dev->data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_EXTEND;
if (vlan_type != ETH_VLAN_TYPE_INNER &&
vlan_type != ETH_VLAN_TYPE_OUTER) {
PMD_DRV_LOG(ERR,
"Unsupported vlan type.");
return -EINVAL;
}
if (!qinq) {
PMD_DRV_LOG(ERR,
"QinQ not enabled. Needs to be ON as we can "
"accelerate only outer vlan\n");
return -EINVAL;
}
if (vlan_type == ETH_VLAN_TYPE_OUTER) {
switch (tpid) {
case RTE_ETHER_TYPE_QINQ:
bp->outer_tpid_bd =
TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8;
break;
case RTE_ETHER_TYPE_VLAN:
bp->outer_tpid_bd =
TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
break;
case 0x9100:
bp->outer_tpid_bd =
TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100;
break;
case 0x9200:
bp->outer_tpid_bd =
TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200;
break;
case 0x9300:
bp->outer_tpid_bd =
TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300;
break;
default:
PMD_DRV_LOG(ERR, "Invalid TPID: %x\n", tpid);
return -EINVAL;
}
bp->outer_tpid_bd |= tpid;
PMD_DRV_LOG(INFO, "outer_tpid_bd = %x\n", bp->outer_tpid_bd);
} else if (vlan_type == ETH_VLAN_TYPE_INNER) {
PMD_DRV_LOG(ERR,
"Can accelerate only outer vlan in QinQ\n");
return -EINVAL;
}
return 0;
}
static int
bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev,
struct rte_ether_addr *addr)
{
struct bnxt *bp = dev->data->dev_private;
/* Default Filter is tied to VNIC 0 */
struct bnxt_vnic_info *vnic = BNXT_GET_DEFAULT_VNIC(bp);
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (BNXT_VF(bp) && !BNXT_VF_IS_TRUSTED(bp))
return -EPERM;
if (rte_is_zero_ether_addr(addr))
return -EINVAL;
/* Filter settings will get applied when port is started */
if (!dev->data->dev_started)
return 0;
/* Check if the requested MAC is already added */
if (memcmp(addr, bp->mac_addr, RTE_ETHER_ADDR_LEN) == 0)
return 0;
/* Destroy filter and re-create it */
bnxt_del_dflt_mac_filter(bp, vnic);
memcpy(bp->mac_addr, addr, RTE_ETHER_ADDR_LEN);
if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
/* This filter will allow only untagged packets */
rc = bnxt_add_vlan_filter(bp, 0);
} else {
rc = bnxt_add_mac_filter(bp, vnic, addr, 0, 0);
}
PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
return rc;
}
static int
bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
struct rte_ether_addr *mc_addr_set,
uint32_t nb_mc_addr)
{
struct bnxt *bp = eth_dev->data->dev_private;
char *mc_addr_list = (char *)mc_addr_set;
struct bnxt_vnic_info *vnic;
uint32_t off = 0, i = 0;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
vnic = BNXT_GET_DEFAULT_VNIC(bp);
if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
goto allmulti;
}
/* TODO Check for Duplicate mcast addresses */
vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
for (i = 0; i < nb_mc_addr; i++) {
memcpy(vnic->mc_list + off, &mc_addr_list[i],
RTE_ETHER_ADDR_LEN);
off += RTE_ETHER_ADDR_LEN;
}
vnic->mc_addr_cnt = i;
if (vnic->mc_addr_cnt)
vnic->flags |= BNXT_VNIC_INFO_MCAST;
else
vnic->flags &= ~BNXT_VNIC_INFO_MCAST;
allmulti:
return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
}
static int
bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
{
struct bnxt *bp = dev->data->dev_private;
uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
uint8_t fw_rsvd = bp->fw_ver & 0xff;
int ret;
ret = snprintf(fw_version, fw_size, "%d.%d.%d.%d",
fw_major, fw_minor, fw_updt, fw_rsvd);
ret += 1; /* add the size of '\0' */
if (fw_size < (uint32_t)ret)
return ret;
else
return 0;
}
static void
bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo)
{
struct bnxt *bp = dev->data->dev_private;
struct bnxt_rx_queue *rxq;
if (is_bnxt_in_error(bp))
return;
rxq = dev->data->rx_queues[queue_id];
qinfo->mp = rxq->mb_pool;
qinfo->scattered_rx = dev->data->scattered_rx;
qinfo->nb_desc = rxq->nb_rx_desc;
qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
qinfo->conf.rx_drop_en = 0;
qinfo->conf.rx_deferred_start = rxq->rx_deferred_start;
}
static void
bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo)
{
struct bnxt *bp = dev->data->dev_private;
struct bnxt_tx_queue *txq;
if (is_bnxt_in_error(bp))
return;
txq = dev->data->tx_queues[queue_id];
qinfo->nb_desc = txq->nb_tx_desc;
qinfo->conf.tx_thresh.pthresh = txq->pthresh;
qinfo->conf.tx_thresh.hthresh = txq->hthresh;
qinfo->conf.tx_thresh.wthresh = txq->wthresh;
qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
qinfo->conf.tx_rs_thresh = 0;
qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
}
int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
{
struct bnxt *bp = eth_dev->data->dev_private;
uint32_t new_pkt_size;
uint32_t rc = 0;
uint32_t i;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
/* Exit if receive queues are not configured yet */
if (!eth_dev->data->nb_rx_queues)
return rc;
new_pkt_size = new_mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN +
VLAN_TAG_SIZE * BNXT_NUM_VLANS;
#ifdef RTE_ARCH_X86
/*
* If vector-mode tx/rx is active, disallow any MTU change that would
* require scattered receive support.
*/
if (eth_dev->data->dev_started &&
(eth_dev->rx_pkt_burst == bnxt_recv_pkts_vec ||
eth_dev->tx_pkt_burst == bnxt_xmit_pkts_vec) &&
(new_pkt_size >
eth_dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
PMD_DRV_LOG(ERR,
"MTU change would require scattered rx support. ");
PMD_DRV_LOG(ERR, "Stop port before changing MTU.\n");
return -EINVAL;
}
#endif
if (new_mtu > RTE_ETHER_MTU) {
bp->flags |= BNXT_FLAG_JUMBO;
bp->eth_dev->data->dev_conf.rxmode.offloads |=
DEV_RX_OFFLOAD_JUMBO_FRAME;
} else {
bp->eth_dev->data->dev_conf.rxmode.offloads &=
~DEV_RX_OFFLOAD_JUMBO_FRAME;
bp->flags &= ~BNXT_FLAG_JUMBO;
}
/* Is there a change in mtu setting? */
if (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len == new_pkt_size)
return rc;
for (i = 0; i < bp->nr_vnics; i++) {
struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
uint16_t size = 0;
vnic->mru = BNXT_VNIC_MRU(new_mtu);
rc = bnxt_hwrm_vnic_cfg(bp, vnic);
if (rc)
break;
size = rte_pktmbuf_data_room_size(bp->rx_queues[0]->mb_pool);
size -= RTE_PKTMBUF_HEADROOM;
if (size < new_mtu) {
rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
if (rc)
return rc;
}
}
if (!rc)
eth_dev->data->dev_conf.rxmode.max_rx_pkt_len = new_pkt_size;
PMD_DRV_LOG(INFO, "New MTU is %d\n", new_mtu);
return rc;
}
static int
bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
{
struct bnxt *bp = dev->data->dev_private;
uint16_t vlan = bp->vlan;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
PMD_DRV_LOG(ERR,
"PVID cannot be modified for this function\n");
return -ENOTSUP;
}
bp->vlan = on ? pvid : 0;
rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
if (rc)
bp->vlan = vlan;
return rc;
}
static int
bnxt_dev_led_on_op(struct rte_eth_dev *dev)
{
struct bnxt *bp = dev->data->dev_private;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
return bnxt_hwrm_port_led_cfg(bp, true);
}
static int
bnxt_dev_led_off_op(struct rte_eth_dev *dev)
{
struct bnxt *bp = dev->data->dev_private;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
return bnxt_hwrm_port_led_cfg(bp, false);
}
static uint32_t
bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
{
struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
uint32_t desc = 0, raw_cons = 0, cons;
struct bnxt_cp_ring_info *cpr;
struct bnxt_rx_queue *rxq;
struct rx_pkt_cmpl *rxcmp;
int rc;
rc = is_bnxt_in_error(bp);
if (rc)
return rc;
rxq = dev->data->rx_queues[rx_queue_id];
cpr = rxq->cp_ring;
raw_cons = cpr->cp_raw_cons;
while (1) {
cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
rte_prefetch0(&cpr->cp_desc_ring[cons]);
rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) {
break;
} else {
raw_cons++;
desc++;
}
}
return desc;
}
static int
bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
{
struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
struct bnxt_rx_ring_info *rxr;
struct bnxt_cp_ring_info *cpr;
struct bnxt_sw_rx_bd *rx_buf;
struct rx_pkt_cmpl *rxcmp;
uint32_t cons, cp_cons;
int rc;
if (!rxq)
return -EINVAL;
rc = is_bnxt_in_error(rxq->bp);
if (rc)
return rc;
cpr = rxq->cp_ring;
rxr = rxq->rx_ring;
if (offset >= rxq->nb_rx_desc)
return -EINVAL;
cons = RING_CMP(cpr->cp_ring_struct, offset);
cp_cons = cpr->cp_raw_cons;
rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
if (cons > cp_cons) {
if (CMPL_VALID(rxcmp, cpr->valid))
return RTE_ETH_RX_DESC_DONE;
} else {
if (CMPL_VALID(rxcmp, !cpr->valid))
return RTE_ETH_RX_DESC_DONE;
}
rx_buf = &rxr->rx_buf_ring[cons];
if (rx_buf->mbuf == NULL)
return RTE_ETH_RX_DESC_UNAVAIL;
return RTE_ETH_RX_DESC_AVAIL;
}
static int
bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
{
struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
struct bnxt_tx_ring_info *txr;
struct bnxt_cp_ring_info *cpr;
struct bnxt_sw_tx_bd *tx_buf;
struct tx_pkt_cmpl *txcmp;
uint32_t cons, cp_cons;
int rc;
if (!txq)
return -EINVAL;
rc = is_bnxt_in_error(txq->bp);
if (rc)
return rc;
cpr = txq->cp_ring;
txr = txq->tx_ring;
if (offset >= txq->nb_tx_desc)
return -EINVAL;
cons = RING_CMP(cpr->cp_ring_struct, offset);
txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
cp_cons = cpr->cp_raw_cons;
if (cons > cp_cons) {
if (CMPL_VALID(txcmp, cpr->valid))
return RTE_ETH_TX_DESC_UNAVAIL;
} else {
if (CMPL_VALID(txcmp, !cpr->valid))
return RTE_ETH_TX_DESC_UNAVAIL;
}
tx_buf = &txr->tx_buf_ring[cons];
if (tx_buf->mbuf == NULL)
return RTE_ETH_TX_DESC_DONE;
return RTE_ETH_TX_DESC_FULL;
}
static struct bnxt_filter_info *
bnxt_match_and_validate_ether_filter(struct bnxt *bp,
struct rte_eth_ethertype_filter *efilter,
struct bnxt_vnic_info *vnic0,
struct bnxt_vnic_info *vnic,
int *ret)
{
struct bnxt_filter_info *mfilter = NULL;
int match = 0;
*ret = 0;
if (efilter->ether_type == RTE_ETHER_TYPE_IPV4 ||
efilter->ether_type == RTE_ETHER_TYPE_IPV6) {
PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
" ethertype filter.", efilter->ether_type);
*ret = -EINVAL;
goto exit;
}
if (efilter->queue >= bp->rx_nr_rings) {
PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
*ret = -EINVAL;
goto exit;
}
vnic0 = BNXT_GET_DEFAULT_VNIC(bp);
vnic = &bp->vnic_info[efilter->queue];
if (vnic == NULL) {
PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
*ret = -EINVAL;
goto exit;
}
if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
if ((!memcmp(efilter->mac_addr.addr_bytes,
mfilter->l2_addr, RTE_ETHER_ADDR_LEN) &&
mfilter->flags ==
HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
mfilter->ethertype == efilter->ether_type)) {
match = 1;
break;
}
}
} else {
STAILQ_FOREACH(mfilter, &vnic->filter, next)
if ((!memcmp(efilter->mac_addr.addr_bytes,
mfilter->l2_addr, RTE_ETHER_ADDR_LEN) &&
mfilter->ethertype == efilter->ether_type &&
mfilter->flags ==
HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
match = 1;
break;
}
}
if (match)
*ret = -EEXIST;
exit:
return mfilter;
}
static int
bnxt_ethertype_filter(struct rte_eth_dev *dev,
enum rte_filter_op filter_op,
void *arg)
{
struct bnxt *bp = dev->data->dev_private;
struct rte_eth_ethertype_filter *efilter =
(struct rte_eth_ethertype_filter *)arg;
struct bnxt_filter_info *bfilter, *filter1;
struct bnxt_vnic_info *vnic, *vnic0;
int ret;
if (filter_op == RTE_ETH_FILTER_NOP)
return 0;
if (arg == NULL) {
PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
filter_op);
return -EINVAL;
}
vnic0 = BNXT_GET_DEFAULT_VNIC(bp);
vnic = &bp->vnic_info[efilter->queue];
switch (filter_op) {
case RTE_ETH_FILTER_ADD:
bnxt_match_and_validate_ether_filter(bp, efilter,
vnic0, vnic, &ret);
if (ret < 0)
return ret;
bfilter = bnxt_get_unused_filter(bp);
if (bfilter == NULL) {
PMD_DRV_LOG(ERR,
"Not enough resources for a new filter.\n");
return -ENOMEM;
}
bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
RTE_ETHER_ADDR_LEN);
memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
RTE_ETHER_ADDR_LEN);
bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
bfilter->ethertype = efilter->ether_type;
bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
if (filter1 == NULL) {
ret = -EINVAL;
goto cleanup;
}
bfilter->enables |=
HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
bfilter->dst_id = vnic->fw_vnic_id;
if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
bfilter->flags =
HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
}
ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
if (ret)
goto cleanup;
STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
break;
case RTE_ETH_FILTER_DELETE:
filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
vnic0, vnic, &ret);
if (ret == -EEXIST) {
ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
next);
bnxt_free_filter(bp, filter1);
} else if (ret == 0) {
PMD_DRV_LOG(ERR, "No matching filter found\n");
}
break;
default:
PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
ret = -EINVAL;
goto error;
}
return ret;
cleanup:
bnxt_free_filter(bp, bfilter);
error:
return ret;
}
static inline int
parse_ntuple_filter(struct bnxt *bp,
struct rte_eth_ntuple_filter *nfilter,
struct bnxt_filter_info *bfilter)
{
uint32_t en = 0;
if (nfilter->queue >= bp->rx_nr_rings) {
PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
return -EINVAL;
}
switch (nfilter->dst_port_mask) {
case UINT16_MAX:
bfilter->dst_port_mask = -1;
bfilter->dst_port = nfilter->dst_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
break;
default:
PMD_DRV_LOG(ERR, "invalid dst_port mask.");
return -EINVAL;
}
bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
switch (nfilter->proto_mask) {
case UINT8_MAX:
if (nfilter->proto == 17) /* IPPROTO_UDP */
bfilter->ip_protocol = 17;
else if (nfilter->proto == 6) /* IPPROTO_TCP */
bfilter->ip_protocol = 6;
else
return -EINVAL;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
break;
default:
PMD_DRV_LOG(ERR, "invalid protocol mask.");
return -EINVAL;
}
switch (nfilter->dst_ip_mask) {
case UINT32_MAX:
bfilter->dst_ipaddr_mask[0] = -1;
bfilter->dst_ipaddr[0] = nfilter->dst_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
break;
default:
PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
return -EINVAL;
}
switch (nfilter->src_ip_mask) {
case UINT32_MAX:
bfilter->src_ipaddr_mask[0] = -1;
bfilter->src_ipaddr[0] = nfilter->src_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
break;
default:
PMD_DRV_LOG(ERR, "invalid src_ip mask.");
return -EINVAL;
}
switch (nfilter->src_port_mask) {
case UINT16_MAX:
bfilter->src_port_mask = -1;
bfilter->src_port = nfilter->src_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
break;
default:
PMD_DRV_LOG(ERR, "invalid src_port mask.");
return -EINVAL;
}
bfilter->enables = en;
return 0;
}
static struct bnxt_filter_info*
bnxt_match_ntuple_filter(struct bnxt *bp,
struct bnxt_filter_info *bfilter,
struct bnxt_vnic_info **mvnic)
{
struct bnxt_filter_info *mfilter = NULL;
int i;
for (i = bp->nr_vnics - 1; i >= 0; i--) {
struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
STAILQ_FOREACH(mfilter, &vnic->filter, next) {
if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
bfilter->src_ipaddr_mask[0] ==
mfilter->src_ipaddr_mask[0] &&
bfilter->src_port == mfilter->src_port &&
bfilter->src_port_mask == mfilter->src_port_mask &&
bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
bfilter->dst_ipaddr_mask[0] ==
mfilter->dst_ipaddr_mask[0] &&
bfilter->dst_port == mfilter->dst_port &&
bfilter->dst_port_mask == mfilter->dst_port_mask &&
bfilter->flags == mfilter->flags &&
bfilter->enables == mfilter->enables) {
if (mvnic)
*mvnic = vnic;
return mfilter;
}
}
}
return NULL;
}
static int
bnxt_cfg_ntuple_filter(struct bnxt *bp,
struct rte_eth_ntuple_filter *nfilter,
enum rte_filter_op filter_op)
{
struct bnxt_filter_info *bfilter, *mfilter, *filter1;
struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
int ret;
if (nfilter->flags != RTE_5TUPLE_FLAGS) {
PMD_DRV_LOG(ERR, "only 5tuple is supported.");
return -EINVAL;
}
if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
return -EINVAL;
}
bfilter = bnxt_get_unused_filter(bp);
if (bfilter == NULL) {
PMD_DRV_LOG(ERR,
"Not enough resources for a new filter.\n");
return -ENOMEM;
}
ret = parse_ntuple_filter(bp, nfilter, bfilter);
if (ret < 0)
goto free_filter;
vnic = &bp->vnic_info[nfilter->queue];
vnic0 = BNXT_GET_DEFAULT_VNIC(bp);
filter1 = STAILQ_FIRST(&vnic0->filter);
if (filter1 == NULL) {
ret = -EINVAL;
goto free_filter;
}
bfilter->dst_id = vnic->fw_vnic_id;
bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
bfilter->enables |=
HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
bfilter->ethertype = 0x800;
bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
bfilter->dst_id == mfilter->dst_id) {
PMD_DRV_LOG(ERR, "filter exists.\n");
ret = -EEXIST;
goto free_filter;
} else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
bfilter->dst_id != mfilter->dst_id) {
mfilter->dst_id = vnic->fw_vnic_id;
ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
goto free_filter;
}
if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
PMD_DRV_LOG(ERR, "filter doesn't exist.");
ret = -ENOENT;
goto free_filter;
}
if (filter_op == RTE_ETH_FILTER_ADD) {
bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
if (ret)
goto free_filter;
STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
} else {
if (mfilter == NULL) {
/* This should not happen. But for Coverity! */
ret = -ENOENT;
goto free_filter;
}
ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
bnxt_free_filter(bp, mfilter);
bnxt_free_filter(bp, bfilter);
}
return 0;
free_filter:
bnxt_free_filter(bp, bfilter);
return ret;
}
static int
bnxt_ntuple_filter(struct rte_eth_dev *dev,
enum rte_filter_op filter_op,
void *arg)
{
struct bnxt *bp = dev->data->dev_private;
int ret;
if (filter_op == RTE_ETH_FILTER_NOP)
return 0;
if (arg == NULL) {
PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
filter_op);
return -EINVAL;
}
switch (filter_op) {
case RTE_ETH_FILTER_ADD:
ret = bnxt_cfg_ntuple_filter(bp,
(struct rte_eth_ntuple_filter *)arg,
filter_op);
break;
case RTE_ETH_FILTER_DELETE:
ret = bnxt_cfg_ntuple_filter(bp,
(struct rte_eth_ntuple_filter *)arg,
filter_op);
break;
default:
PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
ret = -EINVAL;
break;
}
return ret;
}
static int
bnxt_parse_fdir_filter(struct bnxt *bp,
struct rte_eth_fdir_filter *fdir,
struct bnxt_filter_info *filter)
{
enum rte_fdir_mode fdir_mode =
bp->eth_dev->data->dev_conf.fdir_conf.mode;
struct bnxt_vnic_info *vnic0, *vnic;
struct bnxt_filter_info *filter1;
uint32_t en = 0;
int i;
if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
return -EINVAL;
filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
switch (fdir->input.flow_type) {
case RTE_ETH_FLOW_IPV4:
case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
/* FALLTHROUGH */
filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
filter->ip_addr_type =
NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
filter->src_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
filter->dst_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
filter->ethertype = 0x800;
filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
break;
case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
filter->src_port = fdir->input.flow.tcp4_flow.src_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
filter->dst_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
filter->src_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
filter->ip_protocol = 6;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
filter->ip_addr_type =
NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
filter->src_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
filter->dst_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
filter->ethertype = 0x800;
filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
break;
case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
filter->src_port = fdir->input.flow.udp4_flow.src_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
filter->dst_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
filter->src_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
filter->ip_protocol = 17;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
filter->ip_addr_type =
NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
filter->src_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
filter->dst_ipaddr_mask[0] = 0xffffffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
filter->ethertype = 0x800;
filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
break;
case RTE_ETH_FLOW_IPV6:
case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
/* FALLTHROUGH */
filter->ip_addr_type =
NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
rte_memcpy(filter->src_ipaddr,
fdir->input.flow.ipv6_flow.src_ip, 16);
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
rte_memcpy(filter->dst_ipaddr,
fdir->input.flow.ipv6_flow.dst_ip, 16);
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
memset(filter->dst_ipaddr_mask, 0xff, 16);
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
memset(filter->src_ipaddr_mask, 0xff, 16);
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
filter->ethertype = 0x86dd;
filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
break;
case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
filter->src_port = fdir->input.flow.tcp6_flow.src_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
filter->dst_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
filter->src_port_mask = 0xffff;
en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
filter->ip_addr_type =
NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.